The circuit parameters of the diff-amp shown in Figure 11.19 are V + = 3 V , V − = − 3 V , I Q = 0.40 mA , and R D = 7.5 k Ω . The transistor parameters are V T N = 0.5 V , k n ′ = 100 μ A / V 2 , and λ = 0. (a) Design the transistor W / L ratio such that the differential voltage gain is A d = 12. (b) What is the maximum positive common-mode voltage that can be applied such that the transistors remain biased in the saturation region. (Ans. (a) W / L = 256 , (b) v c m = 2 V ).
The circuit parameters of the diff-amp shown in Figure 11.19 are V + = 3 V , V − = − 3 V , I Q = 0.40 mA , and R D = 7.5 k Ω . The transistor parameters are V T N = 0.5 V , k n ′ = 100 μ A / V 2 , and λ = 0. (a) Design the transistor W / L ratio such that the differential voltage gain is A d = 12. (b) What is the maximum positive common-mode voltage that can be applied such that the transistors remain biased in the saturation region. (Ans. (a) W / L = 256 , (b) v c m = 2 V ).
Solution Summary: The author explains the design ratio of the amplifier circuit to meet the specifications.
The circuit parameters of the diff-amp shown in Figure 11.19 are
V
+
=
3
V
,
V
−
=
−
3
V
,
I
Q
=
0.40
mA
,
and
R
D
=
7.5
k
Ω
.
The transistor parameters are
V
T
N
=
0.5
V
,
k
n
′
=
100
μ
A
/
V
2
,
and
λ
=
0.
(a) Design the transistor
W
/
L
ratio such that the differential voltage gain is
A
d
=
12.
(b) What is the maximum positive common-mode voltage that can be applied such that the transistors remain biased in the saturation region. (Ans. (a)
W
/
L
=
256
,
(b)
v
c
m
=
2
V
).
I need help checking if its correct
-E1 + VR1 + VR4 – E2 + VR3 = 0 -------> Loop 1 (a)
R1(I1) + R4(I1 – I2) + R3(I1) = E1 + E2 ------> Loop 1 (b)
R1(I1) + R4(I1) - R4(I2) + R3(I1) = E1 + E2 ------> Loop 1 (c)
(R1 + R3 + R4) (I1) - R4(I2) = E1 + E2 ------> Loop 1 (d)
Now that we have loop 1 equation will procced on finding the equation of I2 current loop. However, a reminder that because we are going in a clockwise direction, it goes against the direction of the current. As such we will get an equation for the matrix that will be:
E2 – VR4 – VR2 + E3 = 0 ------> Loop 2 (a)
-R4(I2 – I1) -R2(I2) = -E2 – E3 ------> Loop 2 (b)
-R4(I2) + R4(I1) - R2(I2) = -E2 – E3 -----> Loop 2 (c)
R4(I1) – (R4 + R2)(I2) = -E2 – E3 -----> Loop 2 (d)
These two equations will be implemented to the matrix formula I = inv(A) * b
R11 R12
(R1 + R3 + R4)
-R4
-R4
R4 + R2
10.2 For each of the following groups of sources, determineif the three sources constitute a balanced source, and if it is,determine if it has a positive or negative phase sequence.(a) va(t) = 169.7cos(377t +15◦) Vvb(t) = 169.7cos(377t −105◦) Vvc(t) = 169.7sin(377t −135◦) V(b) va(t) = 311cos(wt −12◦) Vvb(t) = 311cos(wt +108◦) Vvc(t) = 311cos(wt +228◦) V(c) V1 = 140 −140◦ VV2 = 114 −20◦ VV3 = 124 100◦ V
Apply single-phase equivalency to determine the linecurrents in the Y-D network shown in Fig. P10.13. The loadimpedances are Zab = Zbc = Zca = (25+ j5) W
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