Chapter 11, Problem D11.7P

The diff-amp configuration shown in Figure $\text{P}11.7$ is biased at $\pm 3\text{V}$ . The maximum power dissipation in the entire circuit is to be no more than $1.2\text{mW}$ when $v_1=v_2=0.$ The available transistors have parameters: $\beta =120,V_{BE}(\text{on})=0.7\text{V},$ and $V_A=\infty .$ Design the circuit to produce the maximum possible differential-mode voltage gain, but such that the common-mode input voltage can be within the range $-1\le v_{CM}\le 1\text{V}$ and the transistors are still biased in the forward-active region. What is the value of $A_d?$ What are the current and resistor values?