The differential amplifier shown in Figure P 11.60 has a pair of pnp bipolars as input devices and a pair of npn bipolars connected as an active load. The circuit bias is I Q = 0.2 mA , and the transistor parameters are β = 100 and V A = 100 V . (a) Determine I 0 such that the de currents in the diff-amp are balanced. (b) Find the open-circuit differential-mode voltage gain. (c) Determine the differential-mode voltage gain if a load resistance R L = 250 k Ω is connected to the output.
The differential amplifier shown in Figure P 11.60 has a pair of pnp bipolars as input devices and a pair of npn bipolars connected as an active load. The circuit bias is I Q = 0.2 mA , and the transistor parameters are β = 100 and V A = 100 V . (a) Determine I 0 such that the de currents in the diff-amp are balanced. (b) Find the open-circuit differential-mode voltage gain. (c) Determine the differential-mode voltage gain if a load resistance R L = 250 k Ω is connected to the output.
Solution Summary: The author calculates the value of the I_O for the balanced dc current condition for a given differential amplifier circuit.
The differential amplifier shown in Figure P 11.60 has a pair of pnp bipolars as input devices and a pair of npn bipolars connected as an active load.
The circuit bias is
I
Q
=
0.2
mA
,
and the transistor parameters are
β
=
100
and
V
A
=
100
V
.
(a) Determine
I
0
such that the de currents in the diff-amp are balanced. (b) Find the open-circuit differential-mode voltage gain. (c) Determine the differential-mode voltage gain if a load resistance
R
L
=
250
k
Ω
is connected to the output.
(b)
Below is a FSM with a 1-bit input A, and a 1-bit output Y. Deter-
mine the combined state and output table. Identify the unreachable states, and
sketch the state-transition diagram. In your table and diagram, use Os and 1s
for the states and next states, not symbols like S0, S1, etc.
A
D
D
D
CLK
S'₁₂
S2
S₁₁ S1
Y
S'
r
So
S2
S₁
So
reset
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