Chapter 3, Problem 3.4CAE

Consider the NMOS circuit shown in Figure 3.39. Plot the voltage transfer characteristics using a PSpice simulation. Use transistor parameters similar to those in Example 3.10. What are the values of $V_O$ for $V_I=1.5\text{V}$ and $V_I=5\text{V}$ ?

To determine

To plot: The voltage transfer characteristics using PSpice simulation.

To find: The value of output voltage for the given input voltage.

Answer to Problem 3.4CAE

The required plot is shown in Figure 4 and the output voltage for the input voltage of $1.5\text{V}$ is $4.659\text{V}$ and the value of the output voltage for the input voltage of $5\text{V}$ is $0.10128\text{V}$ .

Explanation of Solution

Given:

The required diagram with the values marked is shown in Figure 1

  

Figure 1

Calculation:

Draw the PSpice equivalent circuit with all the values marked.

  

The snip for the drop box with all the setting is shown in Figure 3

  

Left click on the trace option and then click on add trace and type “V(Vo)”command in trace expression box to obtain the voltage transfer characteristic of the inverter.

The required characteristic diagram is shown in Figure 4

  

Consider the input voltage is $1.5\text{V}$ .

The expression for the current $I_{DD1}$ is given by,

  $I_{DD1}=K_{nD}{\left(V_{GSD1}-V_{TND}\right)}^2$

The expression for the current $I_{DL1}$ is given by,

  $I_{DL1}=K_{nL}{\left[2\left(V_{GSL1}-V_{TNL}\right)V_{DSL1}-{\left(V_{DSL1}\right)}^2\right]}^2$

The expression for the value of the voltage $V_{GSL1}$ is evaluated as,

  $\begin{array}{l}{V}_{GSD1}=V_{I1}\\ V_{DSD1}=V_{O1}\\ V_{GSL1}=V_{DSL1}\\ V_{GSL1}=V_{DD}-V_{O1}\end{array}$

The expression for the current $I_{DD1}$ is given by,

  $I_{DD1}=I_{DL1}$

Substitute $V_{DD}-V_{O1}$ for $V_{DSL1}$ , $V_{I1}$ for $V_{GSD1}$ , $0$ for $V_{GSL1}$ , $K_{nL}{\left(V_{GSL1}-V_{TNL}\right)}^2$ for $I_{DL1}$ and $K_{nD}{\left(V_{GSD1}-V_{TND}\right)}^2$ for $I_{DD1}$ in the above equation.

  $K_{nD}{\left(V_{I1}-V_{TND}\right)}^2=K_{nL}\left[2\left(0-V_{TNL}\right)\left(V_{DD}-V_{O1}\right)-{\left(V_{DD}-V_{O1}\right)}^2\right]$

Substitute $-2\text{V}$ for $V_{TNL}$ ,, $1.5\text{V}$ for $V_{I1}$ , $1\text{V}$ for $V_{TND}$ , $50\text{μA}/{\text{V}}^2$ for $K_{nD}$ , and $10\text{μA}/{\text{V}}^2$ for $K_{nL}$ in the above equation.

  $\begin{array}{l}50\text{μA}/{\text{V}}^2{\left(1.5\text{V}-1\text{V}\right)}^2=10\text{μA}/{\text{V}}^2\left[2\left(0-\left(-2\text{V}\right)\right)\left(V_{DD}-V_{O1}\right)-{\left(V_{DD}-V_{O1}\right)}^2\right]\\ {\left(\left(V_{DD}-V_{O1}\right)\right)}^2-4\left(V_{DD}-V_{O1}\right)+1.25=0\\ V_{DD}-V_{O1}=3.65\text{V},0.341\text{V}\end{array}$

Substitute $5\text{V}$ for $V_{DD}$ in the above equation.

  $\begin{array}{l}5\text{V}-V_{O1}=0.341\text{V}\\ V_{O1}=4.659\text{V}\end{array}$

The input voltage is just $1.5\text{V}$ so the output voltage is $2.88\text{V}$ .

Draw the PSpice circuit for the figure 1 with the input voltage of $1.5\text{V}$ .

The required diagram is shown in Figure 5

  

The simulation settings for the circuit is shown in Figure 6

  

The simulated circuit for Figure 5 with the output voltage is shown in Figure 7

  

Thus, the value of the simulated output voltage is same as the theoretical output voltage.

Consider the input voltage is $5\text{V}$ .

Mark the values and draw the circuit for the input voltage of $5\text{V}$ .

The required diagram is shown in Figure 8

  

The values of different voltage are,

  $\begin{array}{l}{V}_{GSD2}=V_{I2}\\ V_{DSD2}=V_{O2}\\ V_{GSL2}=V_{DSL2}\\ V_{GSL2}=V_{DD}-V_{O2}\end{array}$

The driver transistor is biased in non-saturation region as the drain to source voltage is very large. So the expression for the relation of the drain currents is given by,

  $I_{DD2}=I_{DL2}$

The expression for $I_{DD2}$ in non-saturation region is given as,

  $I_{DD2}=K_{nD}\left[2\left(V_{GSD2}-V_{TND}\right)V_{DS2}-{\left(V_{DS2}\right)}^2\right]$

The load transistor is in the saturation region and the drain current is given by,

  $I_{DL2}=K_{nL}{\left[V_{GSL2}-V_{TNL}\right]}^2$

By the relation $I_{DD2}=I_{DL2}$ ,

  $K_{nD}\left[2\left(V_{GSD2}-V_{TND}\right)V_{DS2}-{\left(V_{DS2}\right)}^2\right]=K_{nL}{\left[V_{GSL2}-V_{TNL}\right]}^2$

Substitute $0\text{V}$ for $V_{GSL2}$ in the above equation.

  $K_{nD}\left[2\left(V_{I2}-V_{TND}\right)V_{O2}-{\left(V_{O2}\right)}^2\right]=K_{nL}{\left[-V_{TNL}\right]}^2$

The value of the output voltage is evaluated as,

  $\begin{array}{l}50\text{μA}/{\text{V}}^2\left[2\left(5\text{V}-1\text{V}\right)V_{O2}-{\left(V_{O2}\right)}^2\right]=10\text{μA}/{\text{V}}^2{\left[0-\left(-2\text{V}\right)\right]}^2\\ 5\left[88\left(V_{O2}\right)-{\left(V_{O2}\right)}^2\right]=0\\ V_{O2}=0.10128\text{V},7.89\text{V}\\ V_{O2}=0.10128\text{V}\end{array}$

The simulation circuit for Figure 8 is shown in Figure 9

  

The output of the simulated circuit for the above circuit is shown in Figure 11

  

The circuit diagram with the output voltage is shown in Figure 11

  

Thus, the output voltage of $0.10128\text{V}$ is verified.

Conclusion:

Therefore, the required plot is shown in Figure 4 and the output voltage for the input voltage of $1.5\text{V}$ is $4.659\text{V}$ and the value of the output voltage for the input voltage of $5\text{V}$ is $0.10128\text{V}$ .