Chapter 3, Problem 3.53P

For the two−input NMOS NOR logic gate in Figure 3.46 in the text, the transistor parameters are $V_{TN1}=V_{TN2}=0.6\text{V}$ , ${\lambda }_1={\lambda }_2=0$ , and ${k^{\prime }}_{n1}={k^{\prime }}_{n2}=120\mu {\text{A/V}}^{\text{2}}$ . The drain resistor is $R_D=50\text{k}\Omega$ (a) Determine the width−to−length ratios of the transistors so that $V_O=1.15\text{V}$ when $V_1=V_2=5\text{V}$ .
Assume that ${\left(W/L\right)}_1={\left(W/L\right)}_2$ . (b) Using the results of part (a), find $V_O$ when $V_1=5\text{V}$ and $V_2=0.2\text{V}$ .