Chapter 3, Problem 3.5EP

For the transistor in the circuit in Figure 3.28, the nominal parameter values are $V_{TN}=0.6\text{V}$ and $K_n=0.5{\text{mA/V}}^{\text{2}}$ . (a) Determine the quiescent values $V_{GSQ},I_{DQ}$ and $V_{DSQ}$ . (b) Determine the range in $I_D$ and $V_{DS}$ values for a ±5 percent variation in $V_{TN}$ and $K_n$ . (Ans. (a) $V_{GSQ}=1.667\text{V}$ , $I_{DQ}=0.5689\text{mA}$ , $V_{DSQ}=2.724\text{V}$ ; (b) $\text{0}\text{.5105}\le I_D\le 0.6314\text{mA}$ , $2.474\le V_{DS}\le 2.958\text{V}$ )

To determine

The values of quiescent point $V_{GSQ},I_{DQ},V_{DSQ}$ .

Answer to Problem 3.5EP

  $\begin{array}{l}{V}_{GSQ}=1.667\text{V}\\ I_{DQ}=0.569\text{mA}\\ V_{DSQ}=2.724\text{V}\end{array}$

Explanation of Solution

Given Information:

  

  $\begin{array}{l}{V}_{TN}=0.6\text{V}\\ K_n=0.5\raisebox{1ex}{$\text{mA}$}\!\left/ \!\raisebox{-1ex}{${\text{V}}^{\text{2}}$}\right.\end{array}$

Calculation:

The value of gate voltage is:

  $\begin{array}{l}{V}_G=\frac{R_1{V}^{-}+R_2{V}^{+}}{R_1+R_2}\\ V_G=\frac{-60\left(2.5\right)+30\times \left(2.5\right)}{60+30}\\ V_G=-0.833\text{V}\end{array}$

From the circuit:

  $V_S=-2.5\text{V}$

The value of $V_{GSQ}$ :

  $\begin{array}{l}{V}_{GSQ}=V_G-V_S\\ V_{GSQ}=-0.833-\left(-2.5\right)\\ V_{GSQ}=1.667\text{V}\end{array}$

Assuming the transistor biased in saturation region. The value of $I_{DQ}$ is:

  $\begin{array}{l}{I}_{DQ}=K_n{\left(V_{GS}-V_{TN}\right)}^2\\ I_{DQ}=\left(0.5\times {10}^{-3}\right){\left(1.667-0.6\right)}^2\\ I_{DQ}=0.569\text{mA}\end{array}$

Applying Kirchhoff’s voltage law in drain-source terminals:

  $\begin{array}{l}{V}^{+}=I_D{R}_D+V_{DSQ}+V^{-}\\ 2.5=\left(0.569\right)\left(4\right)+V_{DSQ}-2.5\\ V_{DSQ}=5-2.276\\ V_{DSQ}=2.724\text{V}\end{array}$

From above calculations:

  $\begin{array}{l}{V}_{DSQ}>V_{GSQ}-V_{TN}\\ 2.724>1.667-0.6\\ 2.724>1.067\end{array}$

Hence, the assumption is correct and transistor operates in saturation region.

To determine

The range of values of $I_D,V_{DS}$ .

Answer to Problem 3.5EP

The range of values:

  $\begin{array}{l}0.5108\text{mA}\le I_D\le 0.632\text{mA}\\ 2.472\text{V}\le V_{DS}\le 2.957\text{V}\end{array}$

Explanation of Solution

Given Information:

The given circuit is shown below.

  

  $\begin{array}{l}{V}_{TN}=0.6\pm \left(5\%\text{of}0.6\right)\text{V}\\ K_n=0.5\pm \left(5\%\text{of}0.5\right)\raisebox{1ex}{$\text{mA}$}\!\left/ \!\raisebox{-1ex}{${\text{V}}^{\text{2}}$}\right.\end{array}$

Calculation:

The value of gate voltage is:

  $\begin{array}{l}{V}_G=\frac{R_1{V}^{-}+R_2{V}^{+}}{R_1+R_2}\\ V_G=\frac{-60\left(2.5\right)+30\times \left(2.5\right)}{60+30}\\ V_G=-0.833\text{V}\end{array}$

From the circuit:

  $V_S=-2.5\text{V}$

The value of $V_{GSQ}$ :

  $\begin{array}{l}{V}_{GS}=V_G-V_S\\ V_{GS}=-0.833-\left(-2.5\right)\\ V_{GS}=1.667\text{V}\end{array}$

Values of $K_n,V_{TN}$ :

  $\begin{array}{l}{K}_n=0.5\pm \left(5\%\text{of}0.5\right)\raisebox{1ex}{$\text{mA}$}\!\left/ \!\raisebox{-1ex}{${\text{V}}^{\text{2}}$}\right.\\ K_n=0.5\pm \left(\frac{5}{100}\times 0.5\right)\raisebox{1ex}{$\text{mA}$}\!\left/ \!\raisebox{-1ex}{${\text{V}}^{\text{2}}$}\right.\\ K_n=0.5\pm \left(0.025\right)\raisebox{1ex}{$\text{mA}$}\!\left/ \!\raisebox{-1ex}{${\text{V}}^{\text{2}}$}\right.\\ {\left(K_n\right)}_{\max }=0.525\raisebox{1ex}{$\text{mA}$}\!\left/ \!\raisebox{-1ex}{${\text{V}}^{\text{2}}$}\right.\\ {\left(K_n\right)}_{\min }=0.475\raisebox{1ex}{$\text{mA}$}\!\left/ \!\raisebox{-1ex}{${\text{V}}^{\text{2}}$}\right.\end{array}$

  $\begin{array}{l}{V}_{TN}=0.6\pm \left(5\%\text{of}0.6\right)\text{V}\\ V_{TN}=0.6\pm \left(\frac{5}{100}\times 0.6\right)\text{V}\\ V_{TN}=0.6\pm 0.03\\ {\left(V_{TN}\right)}_{\max }=0.63\text{V}\\ {\left(V_{TN}\right)}_{\min }=0.57\text{V}\end{array}$

Assuming the transistor biased in saturation region. The value of $I_{DQ}$ is maximum for

  ${\left(K_n\right)}_{\max },{\left(V_{TN}\right)}_{\min }$ .

  $\begin{array}{l}{\left(I_D\right)}_{\max }={\left(K_n\right)}_{\max }{\left(V_{GS}-{\left(V_{TN}\right)}_{\min }\right)}^2\\ {\left(I_D\right)}_{\max }=\left(0.525\times {10}^{-3}\right){\left(1.667-0.57\right)}^2\\ {\left(I_D\right)}_{\max }=0.632\text{mA}\end{array}$

Applying Kirchhoff’s voltage law in drain-source terminals:

  $\begin{array}{l}{\left(V_{DS}\right)}_{\min }=5-{\left(I_D\right)}_{\max }{R}_D\\ {\left(V_{DS}\right)}_{\min }=5-\left(0.632\times 4\right)\\ {\left(V_{DS}\right)}_{\min }=2.472\text{V}\end{array}$

From above calculations:

  $\begin{array}{l}{\left(V_{DS}\right)}_{\min }>V_{GS}-{\left(V_{TN}\right)}_{\min }\\ 2.472>1.667-0.57\\ 2.472>1.097\end{array}$

Hence, the assumption is correct and transistor operates in saturation region.

Assuming the transistor biased in saturation region. The value of $I_{DQ}$ is mnimum for

  ${\left(K_n\right)}_{\min },{\left(V_{TN}\right)}_{\max }$ .

  $\begin{array}{l}{\left(I_D\right)}_{\min }={\left(K_n\right)}_{\min }{\left(V_{GS}-{\left(V_{TN}\right)}_{\max }\right)}^2\\ {\left(I_D\right)}_{\min }=\left(0.475\times {10}^{-3}\right){\left(1.667-0.63\right)}^2\\ {\left(I_D\right)}_{\min }=0.5108\text{mA}\end{array}$

Applying Kirchhoff’s voltage law in drain-source terminals:

  $\begin{array}{l}{\left(V_{DS}\right)}_{\max }=5-{\left(I_D\right)}_{\min }{R}_D\\ {\left(V_{DS}\right)}_{\max }=5-\left(0.5108\times 4\right)\\ {\left(V_{DS}\right)}_{\max }=2.957\text{V}\end{array}$

From above calculations:

  $\begin{array}{l}{\left(V_{DS}\right)}_{\max }>V_{GS}-{\left(V_{TN}\right)}_{\max }\\ 2.957>1.667-0.63\\ 2.957>1.037\end{array}$

Hence, the assumption is correct and transistor operates in saturation region.

The values of $I_D,V_{DS}$ is:

  $\begin{array}{l}0.5108\text{mA}\le I_D\le 0.632\text{mA}\\ 2.472\text{V}\le V_{DS}\le 2.957\text{V}\end{array}$