
(a)
To construct: The table for the state of each transistor.
To find: The output voltage
(a)

Answer to Problem 16.62P
The value of the output voltages is obtained and is shown in Table 2
Explanation of Solution
Calculation:
The given diagram is shown in Figure 1
The given table is shown in Table 1
Table 1
State | CLK | |||
For state 1
The input clock signal input X, Y and Z are at logic zero and the logic function of the output voltage
Substitute
From the circuit the NMOS device with the input
The expression for the logic function of the output voltage
Substitute
The logic function of the output voltage
Substitute
For state 2.
All the inputs are at logic 1.
Substitute
Substitute
Substitute
For state 3.
All the inputs are at logic 0.
Substitute
Substitute
Substitute
For state 4.
The input clock,
Substitute
Substitute
Substitute
For state 5.
All the inputs are at logic zero.
Substitute
Substitute
Substitute
For state 6.
The input clock,
Substitute
Substitute
Substitute
The table for the state of the transistors and the output voltage is shown in table below.
The required table is shown in Table 2
Table 2
State | CLK | ||||||
The table for the state of the transistor is shown below.
Conclusion:
Therefore, the value of the output voltages is obtained and is shown in Table 2
(b)
The logic function that the circuit implements.
(b)

Answer to Problem 16.62P
The logic that the circuit performs is
Explanation of Solution
Calculation:
The expression for the output voltage
Substitute
Conclusion:
Therefore, the logic that the circuit performs is
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Chapter 16 Solutions
Microelectronics: Circuit Analysis and Design
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