Microelectronics: Circuit Analysis and Design
4th Edition
ISBN: 9780073380643
Author: Donald A. Neamen
Publisher: McGraw-Hill Companies, The
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Textbook Question
Chapter 15, Problem D15.73P
(a) Design the circuit shown in Figure P15.72 such that
Figure P15.72
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For the circuit shown, find
(i) closed-loop voltage gain
(ii) Z i of the circuit
(iii) f_max. The slew rate is 0.6V/us.
((write your answer in Kilo ohm))
2Vpp
R
ww
20 kQ
R₁
ww
200 ΚΩ
9+18 V
- 18 V
10 kn R₁₂
ΚΩ
((write your answer in KHz))
illustrate the phenomenon of phase reversal in CE amplifier
i- When signal current =OA, so IB-8uA
ii- When input signal reaches positive peak, so IB=16uA
ii- When input signal reaches negative peak, so IB=4uA
R₁
www
+ Vcc = 12V
Rc=6kn
16 A
8 μA
4 μА
0
www
RE
ẞ = 100
VC
In the circuit shown, find the voltage gain. Given that ẞ = 80 and input resistance Rin=2kQ.
SIGNAL
+10 V
Rc=6kn
4-2
210
Chapter 15 Solutions
Microelectronics: Circuit Analysis and Design
Ch. 15 - Design a twopole lowpass Butterworth filter with a...Ch. 15 - Consider the switchedcapacitor circuit in Figure...Ch. 15 - Prob. 15.3EPCh. 15 - (a) Design a threepole highpass Butterworth active...Ch. 15 - Prob. 15.2TYUCh. 15 - Prob. 15.3TYUCh. 15 - Simulate a 25M resistance using the circuit in...Ch. 15 - Design the phaseshift oscillator shown in Figure...Ch. 15 - Design the Wienbridge circuit in Figure 15.17 to...Ch. 15 - Prob. 15.5TYU
Ch. 15 - Prob. 15.6TYUCh. 15 - Prob. 15.6EPCh. 15 - Redesign the street light control circuit shown in...Ch. 15 - A noninverting Schmitt trigger is shown m Figure...Ch. 15 - For the Schmitt trigger in Figure 15.30(a), the...Ch. 15 - Prob. 15.9TYUCh. 15 - Prob. 15.8EPCh. 15 - Prob. 15.9EPCh. 15 - Consider the 555 IC monostablemultivibrator. (a)...Ch. 15 - The 555 IC is connected as an...Ch. 15 - Prob. 15.10TYUCh. 15 - Prob. 15.11TYUCh. 15 - Prob. 15.12TYUCh. 15 - Prob. 15.12EPCh. 15 - Prob. 15.13EPCh. 15 - (a) Consider the bridge amplifier in Figure 15.46...Ch. 15 - Prob. 15.14EPCh. 15 - Prob. 15.15EPCh. 15 - Prob. 15.16EPCh. 15 - Prob. 1RQCh. 15 - Prob. 2RQCh. 15 - Consider a lowpass filter. What is the slope of...Ch. 15 - Prob. 4RQCh. 15 - Describe how a capacitor in conjunction with two...Ch. 15 - Sketch a onepole lowpass switchedcapacitor filter...Ch. 15 - Explain the two basic principles that must be...Ch. 15 - Prob. 8RQCh. 15 - Prob. 9RQCh. 15 - Prob. 10RQCh. 15 - Prob. 11RQCh. 15 - What is the primary advantage of a Schmitt trigger...Ch. 15 - Sketch the circuit and explain the operation of a...Ch. 15 - Prob. 14RQCh. 15 - Prob. 15RQCh. 15 - Prob. 16RQCh. 15 - Prob. 17RQCh. 15 - Prob. 18RQCh. 15 - Prob. D15.1PCh. 15 - Prob. 15.2PCh. 15 - The specification in a highpass Butterworth filter...Ch. 15 - (a) Design a twopole highpass Butterworth active...Ch. 15 - (a) Design a threepole lowpass Butterworth active...Ch. 15 - Prob. 15.6PCh. 15 - Prob. 15.7PCh. 15 - Prob. 15.8PCh. 15 - A lowpass filter is to be designed to pass...Ch. 15 - Prob. 15.10PCh. 15 - Prob. 15.11PCh. 15 - Prob. D15.12PCh. 15 - Prob. D15.13PCh. 15 - Prob. D15.14PCh. 15 - Prob. 15.15PCh. 15 - Prob. 15.16PCh. 15 - Prob. 15.17PCh. 15 - Prob. 15.18PCh. 15 - A simple bandpass filter can be designed by...Ch. 15 - Prob. 15.20PCh. 15 - Prob. 15.21PCh. 15 - Prob. D15.22PCh. 15 - Prob. 15.23PCh. 15 - Consider the phase shift oscillator in Figure...Ch. 15 - In the phaseshift oscillator in Figure 15.15, the...Ch. 15 - Consider the phase shift oscillator in Figure...Ch. 15 - Prob. 15.27PCh. 15 - Prob. 15.28PCh. 15 - Prob. 15.29PCh. 15 - Prob. 15.30PCh. 15 - Prob. 15.31PCh. 15 - A Wienbridge oscillator is shown in Figure P15.32....Ch. 15 - Prob. 15.33PCh. 15 - Prob. D15.34PCh. 15 - Prob. D15.35PCh. 15 - Prob. 15.36PCh. 15 - Prob. 15.37PCh. 15 - Prob. D15.38PCh. 15 - Prob. 15.39PCh. 15 - Prob. 15.40PCh. 15 - Prob. 15.41PCh. 15 - For the comparator in the circuit in Figure...Ch. 15 - Prob. 15.43PCh. 15 - Prob. 15.44PCh. 15 - Prob. 15.45PCh. 15 - Consider the Schmitt trigger in Figure P15.46....Ch. 15 - The saturated output voltages are VP for the...Ch. 15 - Consider the Schmitt trigger in Figure 15.30(a)....Ch. 15 - Prob. 15.50PCh. 15 - Prob. 15.52PCh. 15 - Prob. 15.53PCh. 15 - Prob. 15.54PCh. 15 - Prob. 15.55PCh. 15 - Prob. 15.56PCh. 15 - Prob. 15.57PCh. 15 - Prob. D15.58PCh. 15 - Prob. 15.59PCh. 15 - The saturated output voltages of the comparator in...Ch. 15 - (a) The monostablemultivibrator in Figure 15.37 is...Ch. 15 - A monostablemultivibrator is shown in Figure...Ch. 15 - Prob. D15.63PCh. 15 - Design a 555 monostablemultivibrator to provide a...Ch. 15 - Prob. 15.65PCh. 15 - Prob. 15.66PCh. 15 - Prob. 15.67PCh. 15 - Prob. 15.68PCh. 15 - An LM380 must deliver ac power to a 10 load. The...Ch. 15 - Prob. 15.70PCh. 15 - Prob. D15.71PCh. 15 - Prob. 15.72PCh. 15 - (a) Design the circuit shown in Figure P15.72 such...Ch. 15 - Prob. 15.74PCh. 15 - Prob. 15.75PCh. 15 - Prob. 15.76PCh. 15 - Prob. D15.77PCh. 15 - Prob. 15.78P
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- For the transistor amplifier shown, R₁-11kQ, R2=6kQ, Rc=2kQ, RE-3kQ and R₁=2k0. (i) Draw d.c. load line (ii) Determine the DC operating point (iii) Draw a.c. load line. Assume V_BE = 0.7 V. and determine the new operating point + Vcc = 15 V RC Cc Cin R1 wwwwww wwwww R₁₂ RE CE RLarrow_forwardthe first part is the second part write your answer such as: (AND, OR, INVERTER, NAND, NOR) D₁ AK D, R₁ B K First Part? the third part is , and the total are R4 R7 Output R5 R₁ T R6 R3 -UBB Second Part? Third Part? Total?arrow_forwardA multistage amplifier has six stages each of which has a power gain of 40. what is the - Total gain of the amplifier in db ? ii- If the negative feedback of 15db is employed, find the resultant gainarrow_forward
- 9.36 Consider the finite-state machine logic implementation in Figure P9.36. (a) Determine the next-state and output logic expressions. (b) Determine the number of possible states. J1 Clk K₁ 101 Ут J2 Clk K₂ Clk Figure P9.36 0 y2 10arrow_forward9.34 Consider the finite-state machine logic implementation in Figure P9.34. (a) Determine the next-state and output logic expressions. (b) Determine the number of possible states. (c) Construct a state assigned table. (d) Construct a state table. (e) Construct a state diagram. (f) Determine the function of the finite-state machine. T₁ x Clk Figure P9.34 Q Clk Q الا T₂ Q 32 Clk Q T3 Q Clk Q Узarrow_forward9.35 Consider the finite-state machine logic implementation in Figure P9.35. (a) Determine the next-state and output logic expressions. (b) Determine the number of possible states. (c) Construct a state assigned table. (d) Construct a state table. (e) Construct a state diagram. (f) Determine the function of the finite-state machine. Clk J Clk K₁ 10 Ут J2 Clk K₂ 10 32 Figure P9.35arrow_forward
- 9.56 Using JK flip-flops, design a synchronous counter that counts in the sequence 1, 3, 0, 2, 1, ... The counter counts only when its enable input x is equal to 1; otherwise, the counter is idle.arrow_forward9.65 Using T flip-flops, design a synchronous counter that counts in the sequence 0, 2, 4, 6, 0, ... The counter counts only when its enable input x is equal to 1; otherwise, the counter is idle.arrow_forward2 Using D flip-flops, design a synchronous counter that counts in the sequence 1, 4, 7, 1, The counter counts only when its enable input x is equal to 1; otherwise, the counter is idle.arrow_forward
- Q1: Write a VHDL code to implement the finite state machine described in the state diagram shown below. Clk D 0 CIK Q D 0 Cik Q =arrow_forwardQ1: Consider the finite state machine logic implementation in Fig. shown below: Construct the state diagram. Repeat the circuit design using j-k flip flop. r" Clk Y D' Y, Clk Q D Clk 10 0 22 3'2arrow_forwardQ: Write a VHDL code to implement the finite state machine described in the state diagram shown below. T 2 Clk Q Clk T₂ 0 la Clk T3 Q Cik 0arrow_forward
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