SUB X5, X15, X4 Suppose we modify the pipeline so that it has only one memory (that handles both instructions and data). In this case, there will be a structural hazard every time a program needs to fetch an instruction during the same cycle in which another instruction accesses data. 1- Draw a pipeline diagram to show where the code above will stall. 2- In general, is it possible to reduce the number of stalls/ NOPs resulting from this structural hazard by reordering code (reordering the instructions)? 3- Must this structural hazard be handled in hardware? We have seen that data hazards can be eliminated by adding NOPs to the code. Can you do the same with this structural hazard? If so, explain how. If not, explain why not. 4- If we run the code above on a single-cycle computer, what kind of hazards are there?

Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
Problem 1PE
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Question
Consider the fragment of LEGv8 assembly
below:
Program1
STUR X16, [X6, #12]
LDUR X16, [X6, #8]
SUB X7, X5, X4
CBZ X7, Label
ADD X5, X1, X4
SUB X5, X15, X4
Suppose we modify the pipeline so that it
has only one memory (that handles both
instructions and data). In this case, there will
be a structural hazard every time a program
needs to fetch an instruction during the
same cycle in which another instruction
accesses data.
1- Draw a pipeline diagram to show where
the code above will stall.
2- In general, is it possible to reduce the
number of stalls/ NOPs resulting from this
structural hazard by reordering code
(reordering the instructions)?
3- Must this structural hazard be handled in
hardware? We have seen that data hazards
can be eliminated by adding NOPs to the
code. Can you do the same with this
structural hazard? If so, explain how. If not,
explain why not.
4- If we run the code above on a single-cycle
computer, what kind of hazards are there?
Student should write a justification for the
answers.
Transcribed Image Text:Consider the fragment of LEGv8 assembly below: Program1 STUR X16, [X6, #12] LDUR X16, [X6, #8] SUB X7, X5, X4 CBZ X7, Label ADD X5, X1, X4 SUB X5, X15, X4 Suppose we modify the pipeline so that it has only one memory (that handles both instructions and data). In this case, there will be a structural hazard every time a program needs to fetch an instruction during the same cycle in which another instruction accesses data. 1- Draw a pipeline diagram to show where the code above will stall. 2- In general, is it possible to reduce the number of stalls/ NOPs resulting from this structural hazard by reordering code (reordering the instructions)? 3- Must this structural hazard be handled in hardware? We have seen that data hazards can be eliminated by adding NOPs to the code. Can you do the same with this structural hazard? If so, explain how. If not, explain why not. 4- If we run the code above on a single-cycle computer, what kind of hazards are there? Student should write a justification for the answers.
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