Computer Systems: A Programmer's Perspective (3rd Edition)
3rd Edition
ISBN: 9780134092669
Author: Bryant, Randal E. Bryant, David R. O'Hallaron, David R., Randal E.; O'Hallaron, Bryant/O'hallaron
Publisher: PEARSON
expand_more
expand_more
format_list_bulleted
Question
Chapter 11.3, Problem 11.1PP
Program Plan Intro
IP addresses:
- The IP address denotes an unsigned integer that is 32-bit.
- The IP addresses is been stored by network programs in IP address structure.
- The addresses present in IP address structure are stored in network byte order.
- An unsigned 32-bit integer is converted from host byte order to network byte order by “htonl” function.
- An unsigned 32-bit integer is converted from network byte order host byte order by “ntohl” function.
- The IP address is presented to humans in a form known as “dotted-decimal” notation.
- Each byte is been represented by its corresponding decimal value and is separated by a period from other bytes.
Expert Solution & Answer
Want to see the full answer?
Check out a sample textbook solutionStudents have asked these similar questions
Answer the given question with a proper explanation and step-by-step solution.
Q1: Determine the physical address of the source operand base on the
Based Indexed Addressing Mode.
The MOV instruction
MOV AX, [BX].[16A0] [SI]
The contents of IP, CS and DS are 0120, A342p, and 2C60, respectively.
Also, the contents of BX and SI are 6752, and C344, respectively.
Explain by the draw the registers and the logical of the system memory in
the before execution and after execution.
Note: the content of PA is 2B7C and the coding of this instruction is
XXXX
Problem
Question 03 (CO3) [0.5 + 0.5 = 1]: Given below are the contents of several Intel 8086 registers
and PHYSICAL memory addresses (ALL in hexadecimal):
Registers:
Memory Locations [Physical Address] = Contents
[05000] = 3300
[06000] = 4444
[07000] = 5555
[95000] = 367A
[96000] = 6666
[97000] = 10C5
DI = 3000
%3D
BX = 3000
%3D
ВР 3 С345
For the following instructions, determine the contents of AX after the each of the instruction has
been executed:
(а) MOV
(b) MOV
АХ, ВР
АХ, [ВХ+DI]
AX =
AX
Chapter 11 Solutions
Computer Systems: A Programmer's Perspective (3rd Edition)
Ch. 11.3 - Prob. 11.1PPCh. 11.3 - Prob. 11.2PPCh. 11.3 - Practice Problem 11.3 (solution page 967) Write a...Ch. 11.4 - Prob. 11.4PPCh. 11.5 - Prob. 11.5PPCh. 11 - Prob. 11.6HWCh. 11 - Prob. 11.7HWCh. 11 - Prob. 11.8HWCh. 11 - Modify TINY SO that when it serves static content,...Ch. 11 - Prob. 11.10HW
Knowledge Booster
Similar questions
- (c) The following Sigma 16 program has been loaded into memory at address 0000: load R3,y[RO] load R4,x[RO] lea R5, 2[RO] sub R1,R4,R3 mul R2,R1,R5 store R2,w[RO] trap RO,RO,RO x data 10 y data 12 w data 0 Show the content of the memory writing hexadecimal representation and using a table with 3 columns: the memory address, the contents of that memory address, and an explanation of what "the content (of that memory address) means". As a reference, here are the opcodes for RRR instructions: add 0, sub 1, mul 2, trap c. And here the opcodes for RX instructions: lea 0, load 1, store 2. [7]arrow_forward3- What is the difference between: a- MOV BX,[1234H] and LEA BX,[1234H] b- LDS AX,[200H] and LES AXX,[200H] 4-Use MOV to load address of memory MEM1.arrow_forwardProblem 1. This problem is about operand modes, in particular about memory addressing using the operand modes described in lecture and the textbook. The following shows the contents of a portion of the program memory (locations Ox10000 through 0x10040), and certain registers. All contents are 64-bit quantities. Address Memory Contents 0x10040 0x10038 0x10030 0x10028 0x10020 0x10018 0x10010 0x10008 0x10000 a. movq (%rdi), %rax b. movq (%rdi,%rsi), %rax 100 0x10040 200 25 0x10028 0x10020 c. movq 8(%rdi, %rcx, 4) %r8 d. movq -8(%rdi,%rsi), rbx 500 0x10018 2 Register Contents %rdi 0x10008 %rsi %rdx %rcx For each of the following instructions, say what value ends up in the destination register. Each instruction starts with the state shown above, i.e., the effects do not accumulate. 0x20 8 4arrow_forward
- Computer Science Problem 3. It should be obvious why the block offset bits are the least-significant bits of the address. But why are the set index bits in the middle of the address? Why not use the most significant bits for the set index, and have the tag be the middle part of the address?arrow_forward4. The following problems deal with translating from C code to MIPS code or MIPS code to C code. Assume that the signed variables f, g, h and i are assigned to registers $s0, $1, $2, $3 respectively. Assume the base address of the integer arrays A and B are in registers $s4 and $55 respectively. Translate the following MIPS code to C code. Please indicate which elements of integer array A and B are modified by this code. addi $t0, $1, 6 sll $t0, $t0, 4 add $t0, $t0, $5 Iw $t0, 0($t0) sw $t0, 4($4)arrow_forwardmicroprocessorsarrow_forward
- Topic : Writing MIPS code. 1.Consider the equation and write MIPS code for it: X=(A[4]+B[2])+(B[3]-5X); Assume array A stores floating-point values and its base address in $s0 and array B stores integer values and its base address is in $s1 register. X is in register $s2.arrow_forwardsap Id=8925arrow_forwardH.W 2) How should the pointer with segment base address equal to A00016and offset address 55FF16 be stored at an even-address boundary starting at 0000816? Is the double word aligned or misaligned? Address Memory (hexadecimal) 0000B 16 AO 0000A16 00 0000916 55 0000816 FFarrow_forward
arrow_back_ios
SEE MORE QUESTIONS
arrow_forward_ios
Recommended textbooks for you
- C++ for Engineers and ScientistsComputer ScienceISBN:9781133187844Author:Bronson, Gary J.Publisher:Course Technology Ptr
C++ for Engineers and Scientists
Computer Science
ISBN:9781133187844
Author:Bronson, Gary J.
Publisher:Course Technology Ptr