ssume we have a direct-mapped cache with 64 blocks and eatdh block consists ol 16 byles, th nitially empty. Consider the following MIPS code: addi stl, Szero, 1200 #1200 - 0100 1011 0000 addi st2, Szero, 2400 #2400 - 1001 0110 0000 addi st0, Szero, 10 oop: beq st0, Szero, exit lw st3, 0(Stl)

Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
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Assume we huve a direct-mapped cache with 64 blocks and eah block consists of 16 bvtes. the cache is
initially
"mptv. Consider the following MIPS Code:
addi stl, szero, 1200 #1200 = 0100 1011 0000
addi st2, Szero, 2400 #2400 = 1001 0110 0000
addi $t0, Szero, 10
loop:
beq St0, 5zero, exit
lw St3, 0(St1)
lw St4, 4(Stl)
lw st5, 0(St2)
addi St0, St0,
į loop
1
exit:
What is the miss Late lor the c it he when eseuting the givenncode? Lxplain vo swer.
Transcribed Image Text:Assume we huve a direct-mapped cache with 64 blocks and eah block consists of 16 bvtes. the cache is initially "mptv. Consider the following MIPS Code: addi stl, szero, 1200 #1200 = 0100 1011 0000 addi st2, Szero, 2400 #2400 = 1001 0110 0000 addi $t0, Szero, 10 loop: beq St0, 5zero, exit lw St3, 0(St1) lw St4, 4(Stl) lw st5, 0(St2) addi St0, St0, į loop 1 exit: What is the miss Late lor the c it he when eseuting the givenncode? Lxplain vo swer.
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