Chapter 4, Problem 4.40P

For the circuit in Figure P4.39, $R_S=1\text{k}\Omega$ and the quiescent drain current is $I_{DQ}=5\text{mA}$ . The transistor parameters are $V_{TN}=-2\text{V}$ , ${k^{\prime }}_n=100\mu {\text{A/V}}^{\text{2}}$ , and $\lambda =0.01{\text{V}}^{-1}$ . (a) Determine the transistor width−to− length ratio. (b) Using the results of part (a), find the small−signal voltage gain for $R_L=\infty$ . (c) Find the small−signal output resistance $R_o$ . (d) Using the results of part (a), find $A_{\upsilon }$ for $R_L=2\text{k}\Omega$ .

To determine

The width to length ratio of the transistor in the given circuit.

Answer to Problem 4.40P

The width to length ratio of the transistors is given by $\left(\frac{W}{L}\right)=23.8$

Explanation of Solution

Given Information:

A source follower depletion NMOS circuit with transistor parameters $V_{TN}=-2\text{ V}$ , $k^{\text{'}}{}_n=\text{100 }\mu {\text{A/V}}^2$ and $\lambda =0.01{\text{ V}}^{-1}$ . The quiescent drain current is $I_{DQ}=5\text{ mA}$

Calculation:

Consider the given circuit in Figure 1 which consists a source follower depletion NMOS circuit .

  

The gate terminal gets grounded when we consider the DC equivalent of the above circuit. The gate current is zero and gate source voltage is expressed as,

  $\begin{array}{c}{V}_{GSQ}=V_{GQ}-V_{SQ}\\ =0-\left(-V_{DD}+I_{DQ}{R}_S\right)\\ =-(-5+5\times {10}^{-3}\times 1\times {10}^3)\\ =0\text{ V}\end{array}$

The drain to source voltage corresponding to operating point is,

  $\begin{array}{c}{V}_{DSQ}=V_{DQ}-V_{SQ}\\ =5-0\\ =5\text{ V}\end{array}$

Assuming the transistor is in saturation, the drain current at quiescent condition is given by,

  $\begin{array}{c}{I}_{DQ}=\frac{k^{\text{'}}{}_n}{2}\frac{W}{L}\left({\left(V_{GSQ}-V_{TN}\right)}^2\left(1+\lambda V_{DSQ}\right)\right)\\ =\frac{k^{\text{'}}{}_n}{2}\frac{W}{L}\left({\left(-V_{TN}\right)}^2\left(1+\lambda V_{DSQ}\right)\right)\end{array}$

Therefore the above equation can be rearranged to get the W/L ratio as,

  $\frac{W}{L}=\frac{2I_{DQ}}{k^{\text{'}}{}_n\left[{\left(-V_{TN}\right)}^2\left(1+\lambda V_{DSQ}\right)\right]}$

Substituting the values of quiescent drain current ,gate-source voltage , threshold voltage and $k^{\text{'}}{}_n=\text{100 }\mu {\text{A/V}}^2$

  $\begin{array}{c}\frac{W}{L}=\frac{2\times 5\times {10}^{-3}}{100\times {10}^{-6}\left[{\left(-(-2)\right)}^2\left(1+0.01\times 5\right)\right]}\\ =23.8\end{array}$

To determine

The small signal voltage gain for a load resistance.

Answer to Problem 4.40P

The small signal voltage gain for $R_L=\infty$ is given by $A_v=0.819$

Explanation of Solution

Given Information:

A source follower depletion NMOS circuit with transistor parameters $V_{TN}=-2\text{ V}$ , $k^{\text{'}}{}_n=\text{100 }\mu {\text{A/V}}^2$ and $\lambda =0.01{\text{ V}}^{-1}$ . The quiescent drain current is $I_{DQ}=5\text{ mA}$

Calculation:

For the circuit in Figure 1, the voltage gain is given by,

  $A_v=\frac{g_m\left(R_s\left|\right|r_o\right)}{1+g_m\left(R_s\left|\right|r_o\right)}$

Here, $g_m$ represents the transconductance of the circuit given by,

  $g_m=2\frac{k^{\text{'}}{}_n}{2}\frac{W}{L}\left(V_{GSQ}-V_{TN}\right)$ /

Substituting the value of width to length ratio from part (a) along with the voltages and $k^{\text{'}}{}_n$ , the transconductance is obtained as,

  $\begin{array}{c}{g}_m=100\times {10}^{-6}\times 23.8\left(0-(-2)\right)\\ =4.76\text{ mA/V}\end{array}$

The transistor output resistance $r_o$ is given by,

  $\begin{array}{c}{r}_o\cong \frac{1}{\lambda I_{DQ}}\\ =\frac{1}{0.01\times 5\times {10}^{-3}}\\ =20\text{ k}\Omega \end{array}$

Substituting these parameters along with the source resistance, the voltage gain can be calculated as,

  $\begin{array}{c}{A}_v=\frac{4.76\times {10}^{-3}\left(1\times {10}^3\left|\right|20\times {10}^3\right)}{1+4.76\times {10}^{-3}\left(1\times {10}^3\left|\right|20\times {10}^3\right)}\\ =\frac{4.76\times {10}^{-3}\times 952.38}{1+4.76\times {10}^{-3}\times 952.38}\\ =0.819\end{array}$

To determine

The small signal output resistance

Answer to Problem 4.40P

The output voltage is given by $V_o=0.297\text{ V}$

Explanation of Solution

Given Information:

A source follower depletion NMOS circuit with transistor parameters $V_{TN}=-2\text{ V}$ , $k^{\text{'}}{}_n=\text{100 }\mu {\text{A/V}}^2$ and $\lambda =0.01{\text{ V}}^{-1}$ . The quiescent drain current is $I_{DQ}=5\text{ mA}$

Calculation:

For the circuit in Figure 1, the small signal output resistance is given by,

  $R_o=\frac{1}{g_m}\left|\right|R_S\left|\right|r_o$

The transconductance of the circuit was obtained in previous part as $g_m=4.76\text{ mA/V}$ and the transistor output resistance $r_o$ is given by $r_o=20\text{ k}\Omega$

Substituting these parameters along with the source resistance, small signal output resistance can be calculated as,

  $\begin{array}{c}{R}_o=\frac{1}{g_m}\left|\right|R_S\left|\right|r_o\\ =\frac{1}{4.76\times {10}^{-3}}\left|\right|1\times {10}^3\left|\right|20\times {10}^3\\ =172.117\Omega \\ \simeq \text{172 }\Omega \end{array}$

To determine

The small signal voltage gain for a load resistance.

Answer to Problem 4.40P

The small signal voltage gain for $R_L=2\text{ k}\Omega$ is given by $A_v=0.754$

Explanation of Solution

Given Information:

A source follower depletion NMOS circuit with transistor parameters $V_{TN}=-2\text{ V}$ , $k^{\text{'}}{}_n=\text{100 }\mu {\text{A/V}}^2$ and $\lambda =0.01{\text{ V}}^{-1}$ . The quiescent drain current is $I_{DQ}=5\text{ mA}$

Calculation:

For the circuit in Figure 1, the voltage gain is given by,

  $A_v=\frac{g_m\left(R_s\left|\right|r_o\right)}{1+g_m\left(R_s\left|\right|r_o\right)}$

The transconductance of the circuit was obtained in previous part as $g_m=4.76\text{ mA/V}$ and the transistor output resistance $r_o$ is given by $r_o=20\text{ k}\Omega$ .

Now, when there is a finite load resistance which is given here as $R_L=2\text{ k}\Omega$ ,the expression for voltage gain gets modified as,

  $A_v=\frac{g_m\left(R_s\left|\right|r_o\left|\right|R_L\right)}{1+g_m\left(R_s\left|\right|r_o\left|\right|R_L\right)}$

Substituting these parameters along with the load resistance resistance, the voltage gain can be calculated as,

  $\begin{array}{c}{A}_v=\frac{4.76\times {10}^{-3}\left(1\times {10}^3\left|\right|20\times {10}^3\left|\right|2\times {10}^3\right)}{1+4.76\times {10}^{-3}\left(1\times {10}^3\left|\right|20\times {10}^3\left|\right|2\times {10}^3\right)}\\ =\frac{4.76\times {10}^{-3}\times 645.161}{1+4.76\times {10}^{-3}\times 645.161}\\ =0.754\end{array}$

It can be observed that, with a finite load resistance, the gain is less compared to the output with infinite load.