Chapter 3, Problem 3.145P

As seen in Problem 3.109, silicon carbide nanowires of diameter $D=15\text{nm}$ can be grown onto a solid silicon carbide surface by carefully depositing droplets of catalyst liquid onto a flat silicon carbide substrate. Silicon carbide nanowires grow upward from the deposited drops, and if the drops are deposited in a pattern, an array of nanowire tins can be grown, forming a silicon carbide nano-heat sink. Consider tinned and untinned electronics packages in which an extremely small, $10\text{μm}\text{×}\text{10}\text{μm}$ electronics device is sandwiched between two $d=100$ -nm-thick silicon carbide sheets. In both cases, the coolant is a dielectric liquid at 20°C. A heat transfer coefficient of $h=1\times {10}^5{\text{W/m}}^{\text{2}}\cdot \text{K}$ exists on the top and bottom of the unfinned package and on all surfaces of the exposed silicon carbide tins. which are each $L=300\text{nm}$ long. Each nano-heat sink includes a $200\times 200$ array of nanofins. Determine the maximum allowable heat rate that can be generated by the electronic device so that its temperature is maintained at $T_t<85°\text{C}$ for the untinned and tinned packages.