The transistor in the amplifier circuit shown has kn = 0.5 mA/V², VTH = 1 V and λ = 0. Assume the signal at the gate of the transistor is the sum of the time varying component of VI and the DC bias VG provided by the resistor divider network. That is, VG = V₁ + VG. a. Determine the small signal parameters of the transistor and draw the small signal model of the entire circuit. Assume the capacitor acts as a short circuit at the frequency of v₁. b. Compute for the gain of the amplifier using the small signal model. VI 200 K He www 100 K UG WHI 9V +₁. 5 K vo

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The transistor in the amplifier circuit shown has kn = 0.5 mA/V²,
VTH = 1 V and λ = 0. Assume the signal at the gate of the
transistor is the sum of the time varying component of VI and
the DC bias VG provided by the resistor divider network. That
is, VG = V₁ + VG.
a.
Determine the small signal parameters of the
transistor and draw the small signal model of the
entire circuit. Assume the capacitor acts as a short circuit
at the frequency of Vi.
Compute for the gain of the amplifier using the small signal
model.
VI
200 K
He
100 K
VG
9V
WHI
+₁
5 K
vo
Transcribed Image Text:The transistor in the amplifier circuit shown has kn = 0.5 mA/V², VTH = 1 V and λ = 0. Assume the signal at the gate of the transistor is the sum of the time varying component of VI and the DC bias VG provided by the resistor divider network. That is, VG = V₁ + VG. a. Determine the small signal parameters of the transistor and draw the small signal model of the entire circuit. Assume the capacitor acts as a short circuit at the frequency of Vi. Compute for the gain of the amplifier using the small signal model. VI 200 K He 100 K VG 9V WHI +₁ 5 K vo
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