The circuit for a Bridge Rectifier Voltage Regulator is shown in Figure 6. V1 sine 120 VAC @ 60 Hz Vsecondary 10:1 D1 D2 12 D4 33 D3 Vfiltered C1 Rload Figure 1: Bridge Rectifier Voltage Regulator Circuit The filter capacitor C₁ is recharged on every half-cycle of Vsecondary. Given: Ω Rload = 100 VDiodes = 0.7 V V₁ is given in RMS
Answer all the questions
What is the minimum value of capacitor C1 required such that Vfiltered does not drop below 8 V? Use
the design equation(but make sure you use the right “frequency” and
the correct ripple voltage). Show your calculations. Display your circuit in circuit js.
Display Vsecondary (can use the voltage across the added 100 kΩ resistor) and Vfiltered in a “Combined
Scope”. Display VDC in a separate scope:
a) Turn on “Max Scale”, “Show Peak Value” and “Show Negative Peak Value”:
b) Run the simulator and adjust the window and simulation speed and time step to be able to see a
couple of cycles. Include a screen capture
Document the minimum and maximum values for Vfiltered in your lab report. Is Vfiltered maintained
to be above 8 V? By how much? Why? Explain the waveform shape captured Vfiltered. It may help your understanding
to rerun the simulation with C1 removed and compare that waveform for Vfiltered to that captured
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