In this exercise, we will look at the diff erent ways capacity aff ects overall performance. In general, cache access time is proportional to capacity. Assume that main memory accesses take 70 ns and that memory accesses are 36% of all instructions. Th e following table shows data for L1 caches attached to each of two processors, P1 and P2. L1 SizeL1 Miss RateL1 Hit TimeP12 KiB8.0%0.66 nsP24 KiB6.0%0.90 nsAssuming that the L1 hit time determines the cycle times for P1 and P2, what are their respective clock rates? What is the Average Memory Access Time for P1 and P2? Assuming a base CPI of 1.0 without any memory stalls, what is the total CPI for P1 and P2? Which processor is faster?

1) Respective clock rates = 1/L1 hit time a) Clock Rate for P1 Processor = 1/ 0.66 = 1.515 GHz b)…

Answered: In this exercise, we will look at the…

Computer Networking: A Top-Down Approach (7th Edition)

7th Edition

ISBN:9780133594140

Author:James Kurose, Keith Ross

Publisher:James Kurose, Keith Ross

Chapter1: Computer Networks And The Internet

Section: Chapter Questions

Problem R1RQ: What is the difference between a host and an end system? List several different types of end...

See similar textbooks

Related questions

Question

In this exercise, we will look at the diff erent ways capacity aff ects overall performance. In general, cache access time is proportional to capacity. Assume that main memory accesses take 70 ns and that memory accesses are 36% of all instructions. Th e following table shows data for L1 caches attached to each of two processors, P1 and P2.

	L1 Size	L1 Miss Rate	L1 Hit Time
P1	2 KiB	8.0%	0.66 ns
P2	4 KiB	6.0%	0.90 ns

Assuming that the L1 hit time determines the cycle times for P1 and P2, what are their respective clock rates?
What is the Average Memory Access Time for P1 and P2?
Assuming a base CPI of 1.0 without any memory stalls, what is the total CPI for P1 and P2? Which processor is faster?

Expert Solution