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Given the following cache and cache configuration: 2-way set associative 4 byte cache line 32 byte cache 10 bit address Assume a write-back cache TAG SET OFFSET 6 2 2 Assume that the cache will replace data in block 0 before lines

Given the following cache and cache configuration: 2-way set associative 4 byte cache line 32 byte cache 10 bit address Assume a write-back cache TAG SET OFFSET 6 2 2 Assume that the cache will replace data in block 0 before lines

Computer Networking: A Top-Down Approach (7th Edition)
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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Given the following cache and cache configuration: 2-way set associative 4 byte cache line 32 byte cache 10 bit address Assume a write-back cache TAG SET OFFSET 2 Assume that the cache will replace data in block 0 before lines in block 1 when replacement is required for this question. Data (3..0) A5 06 72 B4 A5 06 72 B4 Block# Tag (binary) 010110 Valid Dirty Set Index = 0 1 010010 Set Index = 1 010110 010111 3A 59 BC 94 1 1 3A 59 BC 94 1 1 111111 110011 Set Index = 2 FF FF FF FF 19 FD E4 FF 1 1 1 1 1 Set Index = 3 1 100100 000011 A4 4A 56 65 1 A4 4A 56 65 For each of the following memory operations fill in the blocks given with the result of the operation on the cache. Use MM to indicate unknown data fetched from memory. The entry below is completed for you as an example of what to do. Operation: CPU reads from $360 Hit(H) or Miss(M): M Fetch from memory? No X Yes, from $360 to $363 Valid Dirty Tag (binary) 110110 --Result-- Block# Data (3..0) Set Index = 0 MM MM MM MM 1 Operation: CPU writes $FF to $24E Hit(H) or Miss(M): Fetch from memory? No _ Yes, from to --Result-- Block# Tag (binary) Data (3..0) Valid Dirty Set Index =
Transcribed Image Text:Given the following cache and cache configuration: 2-way set associative 4 byte cache line 32 byte cache 10 bit address Assume a write-back cache TAG SET OFFSET 2 Assume that the cache will replace data in block 0 before lines in block 1 when replacement is required for this question. Data (3..0) A5 06 72 B4 A5 06 72 B4 Block# Tag (binary) 010110 Valid Dirty Set Index = 0 1 010010 Set Index = 1 010110 010111 3A 59 BC 94 1 1 3A 59 BC 94 1 1 111111 110011 Set Index = 2 FF FF FF FF 19 FD E4 FF 1 1 1 1 1 Set Index = 3 1 100100 000011 A4 4A 56 65 1 A4 4A 56 65 For each of the following memory operations fill in the blocks given with the result of the operation on the cache. Use MM to indicate unknown data fetched from memory. The entry below is completed for you as an example of what to do. Operation: CPU reads from $360 Hit(H) or Miss(M): M Fetch from memory? No X Yes, from $360 to $363 Valid Dirty Tag (binary) 110110 --Result-- Block# Data (3..0) Set Index = 0 MM MM MM MM 1 Operation: CPU writes $FF to $24E Hit(H) or Miss(M): Fetch from memory? No _ Yes, from to --Result-- Block# Tag (binary) Data (3..0) Valid Dirty Set Index =
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