Assuming the expansion of the MIPS register file to 128 registers and the instruction set to contain four times as many instructions, how would this affect the size of each of the bit fields in the R-type instruction? Increase the size of register fields only to accommodate the expanded register file. Increase the size of opcode and register fields to accommodate the expanded instruction set and register file. No change to the size of any bit fields. Decrease the size of opcode and register fields due to more efficient encoding.

Computer Networking: A Top-Down Approach (7th Edition)
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Author:James Kurose, Keith Ross
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Assuming the expansion of the MIPS register file to 128 registers and the instruction set to contain four times as many instructions, how would this affect the size of each of the bit fields in the R-type instruction?
Increase the size of register fields only to accommodate the expanded register file.
Increase the size of opcode and register fields to accommodate the expanded instruction set and register file.
No change to the size of any bit fields.
Decrease the size of opcode and register fields due to more efficient encoding.
Transcribed Image Text:Assuming the expansion of the MIPS register file to 128 registers and the instruction set to contain four times as many instructions, how would this affect the size of each of the bit fields in the R-type instruction? Increase the size of register fields only to accommodate the expanded register file. Increase the size of opcode and register fields to accommodate the expanded instruction set and register file. No change to the size of any bit fields. Decrease the size of opcode and register fields due to more efficient encoding.
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