Describe the modifications to the single clock cycle datapath that would be needed to implement the jalr instruction (jump and link register – see page A.672 of the text), and give the control signal settings that would be required for this instruction.
Describe the modifications to the single clock cycle datapath that would be needed to implement the jalr instruction (jump and link register – see page A.672 of the text), and give the control signal settings that would be required for this instruction.
Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
Problem 1PE
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Question
Describe the modifications to the single clock cycle datapath that would be
needed to implement the jalr instruction (jump and link register – see page A.672 of
the text), and give the control signal settings that would be required for this instruction.
![Jump and link register
0
rd
6
5
5
Unconditionally jump to the instruction whose address is in register rs. Save the address of the next instruction in register rd (which defaults to 31).
jalr rs, rd
rs
LO
5
0
LO
0
LO
5
9
6](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2Fc2b1624f-0c38-4be2-8827-46d361bea958%2F7e46ea3a-a188-4272-9e85-0cc3d66cd579%2Fzt12lm_processed.png&w=3840&q=75)
Transcribed Image Text:Jump and link register
0
rd
6
5
5
Unconditionally jump to the instruction whose address is in register rs. Save the address of the next instruction in register rd (which defaults to 31).
jalr rs, rd
rs
LO
5
0
LO
0
LO
5
9
6
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