We want to design a new K-format instruction for a branch-equal-immediate. A: What information would need to be encoded in a beq R2, 7, loop instruction? B: Why can't we have a beq R2, 7, loop instruction? and C: How could we fix this? Hint: think about the instruction encodings and what we need to encode such an instruction. A: beq R2, 7, loop needs to encode: B: Why can't we have this with the R/I/J formats? Name R-Format I-format J-format K-format C: What tradeoff could we make to implement a K-format? Bit Fields 6 bits op op op 5 bits rs rs 5 bits rt rt 5 bits rd 5 bits shmt funct address/immediate (16) 6 bits target address (26)

Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
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We want to design a new K-format instruction for a branch-equal-immediate.
A: What information would need to be encoded in a beq R2, 7, loop instruction?
B: Why can't we have a beq R2, 7, loop instruction? and C: How could we fix this?
Hint: think about the instruction encodings and what we need to encode such an instruction.
A: beq R2, 7, loop needs to encode:
B: Why can't we have this with the R/I/J formats?
Name
R-Format
I-format
J-format
K-format
C: What tradeoff could we make to implement a K-format?
Bit Fields
6 bits
op
op
op
5 bits
rs
rs
5 bits
rt
rt
5 bits
5 bits
rd
shmt funct
address/immediate (16)
6 bits
target address (26)
Transcribed Image Text:We want to design a new K-format instruction for a branch-equal-immediate. A: What information would need to be encoded in a beq R2, 7, loop instruction? B: Why can't we have a beq R2, 7, loop instruction? and C: How could we fix this? Hint: think about the instruction encodings and what we need to encode such an instruction. A: beq R2, 7, loop needs to encode: B: Why can't we have this with the R/I/J formats? Name R-Format I-format J-format K-format C: What tradeoff could we make to implement a K-format? Bit Fields 6 bits op op op 5 bits rs rs 5 bits rt rt 5 bits 5 bits rd shmt funct address/immediate (16) 6 bits target address (26)
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