igure 1 shows the state transition diagram for an FSM that has 3 inputs, A, B, and C (along with clock and reset) and one output Y. The FSM detects when A and B are both pressed at the same time followed by C being pressed. When this sequence of events is detected, the output Y asserts (i.e., becomes 1) and remains 1 until C is no longer being pressed. At that point, the FSM continues to look for this pattern.  1. Use binary encoding for the states. That is, state S0 = 00, S1 = 01, and S2 =10. The states are named S0, S1, and S2. The state bits are held in the 2-bit signal S1:0. That is, for state S0, the state bits are S1:0 = 00. Notice that S0 is state 0, and S0 is state bit 0. Now write the encoded State Transition Table and the encoded Output Table. Remember that the next state is indicated by S’1:0 or (S’1 S’0).   2. Write next state equations (that is, equations for S’1 and S’0 in terms of the current state, S1 and S0, and the inputs)    3. Write the output equation (an equation for Y in terms of the current state bits, that is in terms of S1 and S0).

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Figure 1 shows the state transition diagram for an FSM that has 3 inputs, A, B, and C (along with clock and reset) and one output Y. The FSM detects when A and B are both pressed at the same time followed by C being pressed. When this sequence of events is detected, the output Y asserts (i.e., becomes 1) and remains 1 until C is no longer being pressed. At that point, the FSM continues to look for this pattern. 

1. Use binary encoding for the states. That is, state S0 = 00, S1 = 01, and S2 =10. The states are named S0, S1, and S2. The state bits are held in the 2-bit signal S1:0. That is, for state S0, the state bits are S1:0 = 00. Notice that S0 is state 0, and S0 is state bit 0. Now write the encoded State Transition Table and the encoded Output Table. Remember that the next state is indicated by S’1:0 or (S’1 S’0).

 

2. Write next state equations (that is, equations for S’1 and S’0 in terms of the current state, S1 and S0, and the inputs) 

 

3. Write the output equation (an equation for Y in terms of the current state bits, that is in terms of S1 and S0).

Reset –
SO
АВ
АВ
S1
C
S2
Y=1
C
Figure 1. State Transition Diagram for Exercise 1
Transcribed Image Text:Reset – SO АВ АВ S1 C S2 Y=1 C Figure 1. State Transition Diagram for Exercise 1
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