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You are to design a Moore type synchronous Finite State Machine. There is a Reset, a single input X, and a single output Z.

You are to design a Moore type synchronous Finite State Machine. There is a Reset, a single input X, and a single output Z.

Database System Concepts
Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
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Create a drawing of the state transition diagram for this FSM.
You are to design a Moore type synchronous Finite State Machine. There is a Reset, a single input X, and a single output Z. The objective of the FSM is to determine when the last four X inputs have the following sequence: 0110 or 1001. The FSM machine starts monitoring X after the Reset input has dropped. Sequences can overlap, so that 011001 will result in 1 0 1 at the output. The following example illustrates the desired behaviour, where Reset and X values are shown on each rising clock edge and the desired output Z (note the output Z on the clock cycle after the complete sequence is detected. This is expected for a Moore state machine) Reset: 1 100000000000000 X: 1010011010010011 Z: 0 0 0 0 0 0 10 1000 1001
Transcribed Image Text:You are to design a Moore type synchronous Finite State Machine. There is a Reset, a single input X, and a single output Z. The objective of the FSM is to determine when the last four X inputs have the following sequence: 0110 or 1001. The FSM machine starts monitoring X after the Reset input has dropped. Sequences can overlap, so that 011001 will result in 1 0 1 at the output. The following example illustrates the desired behaviour, where Reset and X values are shown on each rising clock edge and the desired output Z (note the output Z on the clock cycle after the complete sequence is detected. This is expected for a Moore state machine) Reset: 1 100000000000000 X: 1010011010010011 Z: 0 0 0 0 0 0 10 1000 1001
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