Homework Help is Here – Start Your Trial Now!
Engineering
Computer Engineering
Consider a simple in-order processor with the following characteristics: Consists of a pipeline where one instruction is issued each cycle if possible. • An instruction can issue once all of its dependencies are satisfied. • There is no limit to the number of functional units. • Do not assume all operands are read prior to any being written in a given cycle. Given the following sequential list of instructions and instruction latencies: A. 1dw $r5 = 12[$r8] B. stw 8[$r2] = $r7 c. 1dw $r2 = 4[$r4] D. stw 12[$r8] = $r2

Consider a simple in-order processor with the following characteristics: Consists of a pipeline where one instruction is issued each cycle if possible. • An instruction can issue once all of its dependencies are satisfied. • There is no limit to the number of functional units. • Do not assume all operands are read prior to any being written in a given cycle. Given the following sequential list of instructions and instruction latencies: A. 1dw $r5 = 12[$r8] B. stw 8[$r2] = $r7 c. 1dw $r2 = 4[$r4] D. stw 12[$r8] = $r2

Computer Networking: A Top-Down Approach (7th Edition)
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
See similar textbooks
icon
Related questions
Question
Consider a simple in-order processor with the following characteristics: • Consists of a pipeline where one instruction is issued each cycle if possible. • An instruction can issue once all of its dependencies are satisfied. • There is no limit to the number of functional units. • Do not assume all operands are read prior to any being written in a given cycle. Given the following sequential list of instructions and instruction latencies: A. 1dw $r5 = 12[$r8] B. stw 8[$r2] = $r7 c. 1dw $r2 = 4[$r4] D. stw 12[$r8] = $r2 Instruction Latency add sub 1dw stw mpy 2 2 5 7 4 1. What is the CPI for sequential execution of the code with no data speculation? 2. Create a new schedule to maximize instruction level parallelism (ILP) using instruction scheduling and data speculation, but without register renaming. o Please maintain the original ordering of the instructions. Make sure you include appropriate latencies in the provided schedule. o Calculate the new CPI, assuming no data speculation overhead and that the two locations did not collide
Transcribed Image Text:Consider a simple in-order processor with the following characteristics: • Consists of a pipeline where one instruction is issued each cycle if possible. • An instruction can issue once all of its dependencies are satisfied. • There is no limit to the number of functional units. • Do not assume all operands are read prior to any being written in a given cycle. Given the following sequential list of instructions and instruction latencies: A. 1dw $r5 = 12[$r8] B. stw 8[$r2] = $r7 c. 1dw $r2 = 4[$r4] D. stw 12[$r8] = $r2 Instruction Latency add sub 1dw stw mpy 2 2 5 7 4 1. What is the CPI for sequential execution of the code with no data speculation? 2. Create a new schedule to maximize instruction level parallelism (ILP) using instruction scheduling and data speculation, but without register renaming. o Please maintain the original ordering of the instructions. Make sure you include appropriate latencies in the provided schedule. o Calculate the new CPI, assuming no data speculation overhead and that the two locations did not collide
Expert Solution
steps

Step by step

Solved in 3 steps

SEE SOLUTIONCheck out a sample Q&A here
Blurred answer
Recommended textbooks for you
Computer Networking: A Top-Down Approach (7th Edi…
Computer Networking: A Top-Down Approach (7th Edi…
Computer Engineering
ISBN:
9780133594140
Author:
James Kurose, Keith Ross
Publisher:
PEARSON
Computer Organization and Design MIPS Edition, Fi…
Computer Organization and Design MIPS Edition, Fi…
Computer Engineering
ISBN:
9780124077263
Author:
David A. Patterson, John L. Hennessy
Publisher:
Elsevier Science
Network+ Guide to Networks (MindTap Course List)
Network+ Guide to Networks (MindTap Course List)
Computer Engineering
ISBN:
9781337569330
Author:
Jill West, Tamara Dean, Jean Andrews
Publisher:
Cengage Learning
Concepts of Database Management
Concepts of Database Management
Computer Engineering
ISBN:
9781337093422
Author:
Joy L. Starks, Philip J. Pratt, Mary Z. Last
Publisher:
Cengage Learning
Prelude to Programming
Prelude to Programming
Computer Engineering
ISBN:
9780133750423
Author:
VENIT, Stewart
Publisher:
Pearson Education
Sc Business Data Communications and Networking, T…
Sc Business Data Communications and Networking, T…
Computer Engineering
ISBN:
9781119368830
Author:
FITZGERALD
Publisher:
WILEY
SEE MORE TEXTBOOKS