Answered: Add control states to the following to…

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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Add control states to the following to implement an exchange-with-memory instruction, xchg. such that xchg $rt,immed($rs) acts rather like the combination of a MIPS lw and sw: the result should be as if a sequence like t=memory[immed+rs]; memory[immed+rs]=rt; rt=t; where t is a temporary register. In case you were wondering why one would ever want to do this, it's actually a very common operation for synchronizing between concurrently executing processes using sempahores... but MIPS doesn't happen to do it this way, so it's also not a MIPS instruction. You're probably wondering where the t register is. Well, pick one you're not using... perhaps y (although you have to be careful about when you compute immed+rs for that to work). You should use the encoding suggested by the when below, so an instruction like xchg $9,4($10) would be encoded as op(3)+rt(9)+rs(10)+immed(4).

when (op()) (op(3)) Xchg

Start:
PCout, MARin, MEMread, Yin
CONST(4), ALUadd, Zin, UNTILmfc
MDRout, IRin
Zout, PCin, JUMPonop
HALT /* Should end here on undecoded op */

Xchg:

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The Add control states to the following and implement an exchange-with- a memory instruction

Add the control states to the following to implement an exchange to the memory instruction Xchg such that xchg$rt,immed(\$rs) MIPS Iw and sw: the result should be as if a sequence liket=memory[immed+rs]; memory[immed+rs]=rt; rt=t;

The add to the control states to the following to implement an exchange to the memory instruction xchg such as xchg$rt,immed(\$rs) combination of a MIPS Iw and sw: the result should be as if a sequence t=memory[immed+rs]; memory[immed+rs]=rt; rt=t; where

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