this problem we want to modify the single cycle datapath shown below (also in in slide 1 of hapter3_single_cycle_datapaths.pptx") so that it supports execution of a new instruction called ju gister (jr). Add Read address Instruction (31:0) Instruction [25:21] Instruction [20:16] Instruction Instruction [15:11) memory XEMO) RegDst Instruction [15:0] RegWrite Read register 1 Read register 2 Read data 1 Write Read register data 2 Write data Registers 16 Sign- extend Instruction [5:0] 83 Shift left 2 ALUSre -XCMO ALU Addresult Zero ALU ALU ALU control PCSic ALUOP $rs # copy contents of "rs" register to PC (PC = $rs) NEW O MemWrite Read data Address result Data Write memory data MemRead ou are allowed to add new control signal(s), wire(s), muxe(s) to support this instruction. First brie plain the required modifications. Then indicate the value of each control signal (RegDst, RegWrit LUSrc, ALUOp, MemRead, MemWrite, Mem ToReg). You must use "X" for control signals when plicable. Modification should not effect the functionality of other instructions we have covered so
this problem we want to modify the single cycle datapath shown below (also in in slide 1 of hapter3_single_cycle_datapaths.pptx") so that it supports execution of a new instruction called ju gister (jr). Add Read address Instruction (31:0) Instruction [25:21] Instruction [20:16] Instruction Instruction [15:11) memory XEMO) RegDst Instruction [15:0] RegWrite Read register 1 Read register 2 Read data 1 Write Read register data 2 Write data Registers 16 Sign- extend Instruction [5:0] 83 Shift left 2 ALUSre -XCMO ALU Addresult Zero ALU ALU ALU control PCSic ALUOP $rs # copy contents of "rs" register to PC (PC = $rs) NEW O MemWrite Read data Address result Data Write memory data MemRead ou are allowed to add new control signal(s), wire(s), muxe(s) to support this instruction. First brie plain the required modifications. Then indicate the value of each control signal (RegDst, RegWrit LUSrc, ALUOp, MemRead, MemWrite, Mem ToReg). You must use "X" for control signals when plicable. Modification should not effect the functionality of other instructions we have covered so
Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
Problem 1PE
Related questions
Question
![In this problem we want to modify the single cycle datapath shown below (also in in slide #1 of
"chapter3_single_cycle_datapaths.pptx") so that it supports execution of a new instruction called jump
register (jr).
PC
Add
Read
address
Instruction
[31:0)
Instruction [25:21)
Instruction [20:16]
Instruction Instruction [15:11]
memory
(DMUXT
RegDst
Instruction [15:0]
RegWrite
Read
register 1
Read
register 2
Read
data 1
Write
Read
register data 2
Write
data Registers
16
Sign-
extend
Instruction [5:0]
32
Shift
left 2/
ALUSrc
(OMUXI)
ALU
Addresult
Zero
ALU ALU
result
ALU
control
ALUOP
#copy contents of "rs" register to PC (PC = $rs)
PCSrc
( E3X
MemWrite
Read
data
Address
Data
Write memory
data
MemRead
MemtoReg
(-MUXO)
jr $rs
You are allowed to add new control signal(s), wire(s), muxe(s) to support this instruction. First briefly
explain the required modifications. Then indicate the value of each control signal (RegDst, RegWrite,
ALUSrc, ALUOP, MemRead, Mem Write, MemToReg). You must use "X" for control signals when
applicable. Modification should not effect the functionality of other instructions we have covered so far.](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2F5ecf1484-f95f-4119-9858-43c8382b92c0%2F37e9c05b-6fbe-4081-9265-075f34cea1a2%2Fssoc6vf_processed.jpeg&w=3840&q=75)
Transcribed Image Text:In this problem we want to modify the single cycle datapath shown below (also in in slide #1 of
"chapter3_single_cycle_datapaths.pptx") so that it supports execution of a new instruction called jump
register (jr).
PC
Add
Read
address
Instruction
[31:0)
Instruction [25:21)
Instruction [20:16]
Instruction Instruction [15:11]
memory
(DMUXT
RegDst
Instruction [15:0]
RegWrite
Read
register 1
Read
register 2
Read
data 1
Write
Read
register data 2
Write
data Registers
16
Sign-
extend
Instruction [5:0]
32
Shift
left 2/
ALUSrc
(OMUXI)
ALU
Addresult
Zero
ALU ALU
result
ALU
control
ALUOP
#copy contents of "rs" register to PC (PC = $rs)
PCSrc
( E3X
MemWrite
Read
data
Address
Data
Write memory
data
MemRead
MemtoReg
(-MUXO)
jr $rs
You are allowed to add new control signal(s), wire(s), muxe(s) to support this instruction. First briefly
explain the required modifications. Then indicate the value of each control signal (RegDst, RegWrite,
ALUSrc, ALUOP, MemRead, Mem Write, MemToReg). You must use "X" for control signals when
applicable. Modification should not effect the functionality of other instructions we have covered so far.
Expert Solution
Step 1
Jump instruction resemble the branch but it computes the PC in different way and it is unconditional.
As in branch instruction the lowest 2 bits are always 0.
And the next twenty six bits are taken from 26 but immediate field in jump instruction.
And upper 4 bits of the JTA taken from the upper 4 bits of next instructions
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