Consider a hypothetical computer architecture with a hypothetical assembly language. It has 32-bit registers (named r0, r1, etc) and 32-bit pointers. Its memory consists of 8-bit cells. It has (at least) the following instructions: • lw addr, reg - read a 32-bit value from memory address addr and store it in the named register • sw addr, reg - store the 32-bit value in the register into memory address addr •mov reg, imm- store the immediate value into the register Consider the following code written in this assembly language: mov r3, 0x19fab0c0 SW 0x200, r3 1w 0x200, r5 SW 0x202, r3 1w 0x200, r4 ; write the value in r3 to address 200 ; and read it from 200, into register r5 ; note! we write to address 202, not 200 ; read the 32-bit value at address 200, into r4 Answer the following questions about the value of registers after the above program executes. Give each answer as a single 32-bit number in hex. If the answer cannot be determined from the data given state why. (a) What value would you expect to find in register r5, if this is a big-endian architecture? Explain your answer. (b) What value would you expect to find in register r5, if this is a little-endian architecture? Explain your answer. (c) What value would you expect to find in register r4, if this is a big-endian architecture? Explain your answer. (d) What value would you expect to find in register r4, if this is a little-endian architecture? Explain your answer.