Add control states to the following to implement a two-word load constant value instruction, lv, such that lv $rd,1000000 yields rd=1000000. The constant value being loaded, 1000000 in this case, can be an arbitrary 32-bit value, thus it is the second word of the instruction. The first word of the instruction has the lv opcode and specifies rd. All MIPS instructions are just one word long, so there is no MIPS instruction like this and you will not find an explanation of it in the text, etc. You should use the encoding suggested by the when below, so an instruction like lv $5,42 would be encoded as the two-word sequence op(2)+rd(5), 42. when (op()) (op(2)) Lv Start:  PCout, MARin, MEMread, Yin  CONST(4), ALUadd, Zin, UNTILmfc  MDRout, IRin  Zout, PCin, JUMPonop  HALT /* Should end here on undecoded op */ Lv:

Database System Concepts
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ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
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Chapter1: Introduction
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Add control states to the following to implement a two-word load constant value instruction, lv, such that lv $rd,1000000 yields rd=1000000. The constant value being loaded, 1000000 in this case, can be an arbitrary 32-bit value, thus it is the second word of the instruction. The first word of the instruction has the lv opcode and specifies rd. All MIPS instructions are just one word long, so there is no MIPS instruction like this and you will not find an explanation of it in the text, etc. You should use the encoding suggested by the when below, so an instruction like lv $5,42 would be encoded as the two-word sequence op(2)+rd(5), 42.

when (op()) (op(2)) Lv

Start:
 PCout, MARin, MEMread, Yin
 CONST(4), ALUadd, Zin, UNTILmfc
 MDRout, IRin
 Zout, PCin, JUMPonop
 HALT /* Should end here on undecoded op */

Lv:

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