3) A computer has 8 GByte of memory with 64 bit word sizes. Each block of memory stores 16 words. The computer has a direct-mapped cache of 128 blocks. The computer uses word-level addressing which means that the offset refers to individual words (not bytes) in the block. a) What is the address format? Give the total number of bits needed and how the bits are distributed between the tag, index (which block) and offset. b) If we change the cache to a 4-way set associative cache, what would be the address format?
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- Suppose a computer using direct-mapped cache has 2 bytes of byte-addressable main memory and a cache of 32 blocks, where each cache block contains 16 bytes.Q.) What is the format of a memory address as seen by the cache; that is, what are the sizes of the tag, block, and offset fields?Suppose a computer using direct-mapped cache has 232 bytes of byte-addressable main memory and a cache size of 512 bytes, and each cache block contains 64 bytes.Q.) What is the format of a memory address as seen by cache; that is, what are the sizes of the tag, block, and offset fields?Suppose a computer using direct mapped cache has 224 bytes of byte- addressable main memory and a cache size of 64K bytes, and each cache block contains 32 bytes. (Note: 64K = 26 * 210) a) How many blocks of main memory are there? b) What is the format of a memory address as seen by cache, i.e., what are the sizes of the tag, block, and offset fields?
- Suppose a computer using fully associative cache has 216 bytes of byte-addressable main memory and a cache of 64 blocks, where each cache block contains 32 bytes.Q.) What is the format of a memory address as seen by the cache; that is, what are the sizes of the tag and offset fields?1. Suppose a computer has 2³2 bytes of byte-addressable main memory and a cache size of 2¹5 bytes, and each cache block contains 64 bytes. a) How many blocks of main memory are there? (_ b) How many blocks of cache memory are there? (_ c) If this cache is direct-mapped, what is the format of a memory address as seen by the cache; that is, the size of the tag field_ the size of block field and the size of the offset field_ d) If this cache is fully associative, what is the format of a memory address as seen by the cache; that is, the size of the tag field_ and the size of the offset field e) If this cache is 4-way set associative, what is the format of a memory address as seen by the cache; that is, the size of the tag field_ the size of set field and the size of the offset fieldSuppose the RAM for a certain computer has 4M words, where each word is 16 bits long. What is the capacity of this memory expressed in bytes? If this RAM is byte addressable, how many bits must an address contain? If this RAM is word addressable, how many bits must an address contain?
- The 32-bit number 52AB43FC (in hexadecimal) is stored in abyte-addressable memory starting at physical address FE08 (in hex) using Little-Endian notation. The byte(value ni hexadecimal) stored at theaddress FE0B will beThe contents of memory location B0000, are FF 16, and those at B0001 6 are 0016. What is the data word stored at the address B0000? Is the word aligned or misaligned?6. Suppose the RAM for a certain computer has 256M words, where each word is 32 bits long. a) What is the capacity of this memory expressed in bytes? b) If this RAM is byte addressable, how many bits must an address contain? c) If this RAM is word addressable, how many bits much an address contain?
- Assume a RAM consists of 1M bytes, and it is byte addressable. It uses a cache memory consisting of 16 4K-byte blocks. How many bits are in a RAM address? How many bytes are in the cache memory? How many bits are in the cache tag? How many bits are needed to determine a byte's position within a block?ALSO: What is the hit ratio for the memory accesses (Round to the nearest percent.)The memory unit of a computer has 256K words of 32 bits each. The computer has an instruction format with 4 fields: an opcode field; a mode field to specify 1 of 7 addressing modes; a register address field to specify one of 60 registers; and a memory address field. Assume an instruction is 32 bits long. Answer the following:a. How large must the mode field be?b. How large must the register field be?c. How large must the address field be?d. How large is the opcode field?