Exam1 - 2023fall

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Jan 9, 2024

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EE 316 Quiz 1 September 27, 2023 Copyright © 2023, Nur A. Touba, All Rights Reserved EE 316 - Digital Logic Design QUIZ 1 Fall Semester 2023 Print Name Here _________________________________ UT-EID _________________________________ Signature _________________________________ This is a closed book exam with no calculators allowed. The exam is to be completed in 75 minutes. Don't use scratch paper; show all of your work on these pages . _______Please check here to indicate that you have received all parts of the exam. (8 pages including this one) Problem 1 ____________ ( 6 Points) Problem 2 ____________ ( 8 Points) Problem 3 ____________ ( 8 Points) Problem 4 ____________ ( 10 Points) Problem 5 ____________ ( 6 Points) Problem 6 ____________ ( 8 Points) Problem 7 ____________ ( 10 Points) Total for Exam ____________ ( 56 Points)
NAME ______________________ EE 316 Quiz 1 September 27, 2023 Copyright © 2023, Nur A. Touba, All Rights Reserved 2 Problem 1 (6 points) Numbers and Conversions A. Convert (47.5625) to binary (using division/multiplication method) Ans B. Convert (215) 7 to base 5 Ans
NAME ______________________ EE 316 Quiz 1 September 27, 2023 Copyright © 2023, Nur A. Touba, All Rights Reserved 3 Problem 2 (8 points) Boolean Algebra A. Factor as much as possible (do not use K-map). Put answer in product-of-sums form: i) AC’ + A’BC’D Ans ii) BCD’ + A’BCE + A’BDE’ + BC’D’ Ans B. Reduce to 3 terms using only consensus theorem and write answer in sum-of-products A B’ + B’D + ACD + BCD + A’D Ans C. Find Z’ if Z = ( A + F)(BD + C)E’ and write it in sum-of-products form Ans
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NAME ______________________ EE 316 Quiz 1 September 27, 2023 Copyright © 2023, Nur A. Touba, All Rights Reserved 4 Problem 3 (8 points) Minterm and Maxterm Expansion For the following Boolean function Z(A,B,C) = A’C + AC’ A. Write the truth table for Z(A,B,C) Ans B. Write the minterm expansion for Z in decimal form Ans C. Write the maxterm expansion for Z’ in decimal form Ans
NAME ______________________ EE 316 Quiz 1 September 27, 2023 Copyright © 2023, Nur A. Touba, All Rights Reserved 5 Problem 4 (10 points) Karnaugh Map Use any of the K-maps below as you like. Find a minimum sum-of-products solutions for f(A,B,C,D) = m(1,3,5,8,10,13,14,15) + d(0,7,9) A. List all essential implicants Ans B. Write the minimal sum-of-products Ans
NAME ______________________ EE 316 Quiz 1 September 27, 2023 Copyright © 2023, Nur A. Touba, All Rights Reserved 6 Problem 5 (6 points) NAND/NOR Conversion Using only NOR gates and inverters, implement the function shown in the K-map below as a two-level circuit. For full credit, design the circuit so that the total number of gate inputs is minimized assuming an input variable and its complement are both available. For example, a circuit with a 3-input NOR gate, a 2-input NOR gate, and an inverter would have a total of (3+2+1=6) gate inputs. Ans X 1 0 1 1 CD AB 0 X 1 X 1 X X 1 1 1 0 1 0 1 1 1 CD AB X 1 X 1 X 1 X 1 0 0 X X 1 0 1 1 CD AB 0 X 1 X 1 X X 1 1 1 0 X 1 0 1 1 CD AB 0 X 1 X 1 X X 1 1 1 0
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NAME ______________________ EE 316 Quiz 1 September 27, 2023 Copyright © 2023, Nur A. Touba, All Rights Reserved 7 Problem 6 (8 points) Combinational Design Design a minimal circuit where inputs (a,b,c) represent a binary number N where a is the most significant bit and c is the least significant bit (i.e., a’b’c = 1 and ab’c’ = 4) which outputs a single value Z that is true if the input is greater than 4. For example, if the input is a=1, b=1, c=0, that would correspond to an input of 6 which is greater than 4, so the output would be 1. Assume the inputs will always be in the range of 2-7. 0 1 BC A 00 01 11 10 0 1 BC A 00 01 11 10 A. Write a minimal sum-of-products logic equation for output Z Ans B. Write a minimal product-of-sums logic equation for output Z Ans
NAME ______________________ EE 316 Quiz 1 September 27, 2023 Copyright © 2023, Nur A. Touba, All Rights Reserved 8 Problem 7 (10 points) Multiple Choice Multiple Choice. Circle all of the answers that are correct (may be more than one answer) . A. Which are true about the following Boolean expression: AC’ + ABC + AB’ (i) It uses 3 variables (ii) The literal count is 6 (iii) It has 3 product terms (iv) It has 4 minterms B. Which of the following are true (i) The dual of a Boolean theorem is also true (ii) NOR gates are functionally complete (iii) The XNOR function is the complement of the XOR function (iv) VHDL was originally developed for documenting designs whereas Verilog was originally developed for synthesis C. Which of the following are true about a test bench in Verilog (i) Can use system tasks to display to the screen (ii) Instantiates module that is to be tested (iii) Is typically synthesized along with the rest of the design (iv) Helps to automate verification that a design is working correctly D. Which of the following are true about the wire type in Verilog (i) Has default value of X (ii) Can be used for module outputs (iii) Can be used on the right hand side of an assignment in an always block (iv) Can be used on the left hand side of a concurrent “assign” statement E. Which of the following statements evaluate to 1'b1 (i) 1’bX ? 1’b1 : 1’b1 (ii) (2’b10 && 2’b01) & 1’b1 (iii) (2’b10 & 2’b01) && 1’b1 (iv) !(2’b00)