Chapter 3.8, Problem 3.38PP

Explanation of Solution

Load Effective Address:

• The load effective address instruction “leaq” is a variant of “movq” instruction.
• The instruction form reads memory to a register, but memory is not been referenced at all.
• The first operand of instruction is a memory reference; the effective address is been copied to destination.
• The pointers could be generated for later references of memory.
• The common arithmetic operations could be described compactly using this instruction.
• The operand in destination should be a register.

Data movement instructions:

• The different instructions are been grouped as “instruction classes”.
• The instructions in a class performs same operation but with different sizes of operand.
• The “Mov” class denotes data movement instructions that copy data from a source location to a destination.
• The class has 4 instructions that includes:
  • movb:
    • It copies data from a source location to a destination.
    • It denotes an instruction that operates on 1 byte data size.
  • movw: 
    • It copies data from a source location to a destination.
    • It denotes an instruction that operates on 2 bytes data size.
  • movl:
    • It copies data from a source location to a destination.
    • It denotes an instruction that operates on 4 bytes data size.
  • movq:
    • It copies data from a source location to a destination.
    • It denotes an instruction that operates on 8 bytes data size.

Array indexing:

• The declaration “T D[R][C]” where “T” denotes as a data type, “D” an array and “R” as well as “C” denotes rows and columns respectively.
• The “L” denotes size of data type.
• The array element “D[i][j]” is at address “&D[i][j]=x_D+L(C.i+j)”.

Explanation:

• The details of instructions are shown below:
  • The registers “%rdi” and “%rsi” contains values for “i” and “j” respectively.
  • The instruction “leaq 0(,%rdi, 8), %rdx” performs operation “8i” and stores in register “%rdi”...