MICROELECT. CIRCUIT ANALYSIS&DESIGN (LL)
4th Edition
ISBN: 9781266368622
Author: NEAMEN
Publisher: MCG
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Question
Chapter 17, Problem 17.5TYU
(a)
To determine
The value of the current
(b)
To determine
The value of the current
(c)
To determine
The value of the current
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Introduction
The circuit of Fig. 1 is required to be modeled using a state - space representation, where 2
states will be used, based on the number of the energy - storing elements of the circuit, the
capacitor and the inductor.
u(t)
+
ΙΩ
www
13
F
5 Ω it (t)
www
vc(t) 1 H
Figure 1: LCR circuit
The input signal to the circuit is the voltage u(t) in Volts and the output signal is the voltage
across the capacitor, vc(t).
Questions
1. Choice of system states:
Choose appropriate signals for the 2 states of the
system.
x₁(t) = i₁(t)
x₂ (t) =
5. State transition matrix:
(t), which is defined as,
Calculate analytically the state transition matrix
(t) = et = L¯¹{(sI – A)¯¹}
Show that the answer is the following,
1
e-4t cos(√2t) -
e-4 sin(√2 t)
1
e
-4t
√2
(t) = et
-3
1
-4t sin (√2 t)
e
COS
-4t cos (√2t) + -
e
sin(√2 t)
2-4t sin(√2 t)|
Calculate the following:
(SI - A)-1=
Use the completion - in - the-square technique (CASE 3) to calculate the inverse Laplace:
L¯¹{(SI - A)¯¹} =
A single-core cable working on 66 kV has a conductor diameter of 2 cm and the sheath of inside diameter
is 10 cm. If two metallic intersheaths of diameters 5 cm, 8 cm respectively are used for grading the cable.. If
the maximum electric stress is the same for each layers.
1- Find the voltage of each metallic intersheaths.
2- Find the thickness of each layers.
Chapter 17 Solutions
MICROELECT. CIRCUIT ANALYSIS&DESIGN (LL)
Ch. 17 - Consider the differential amplifier circuit in...Ch. 17 - Prob. 17.2EPCh. 17 - The reference circuit in Figure 17.5 is to be...Ch. 17 - Assume the maximum currents in Q3 and Q4 of the...Ch. 17 - Prob. 17.5EPCh. 17 - Prob. 17.6EPCh. 17 - Prob. 17.1TYUCh. 17 - Prob. 17.2TYUCh. 17 - Prob. 17.7EPCh. 17 - Prob. 17.3TYU
Ch. 17 - The ECL circuit in Figure 17.19 is an example of...Ch. 17 - Consider the basic DTL circuit in Figure 17.20...Ch. 17 - The parameters of the TIL NAND circuit in Figure...Ch. 17 - Prob. 17.10EPCh. 17 - Prob. 17.5TYUCh. 17 - Prob. 17.6TYUCh. 17 - Prob. 17.7TYUCh. 17 - Prob. 17.8TYUCh. 17 - Prob. 17.11EPCh. 17 - Prob. 17.12EPCh. 17 - Prob. 17.9TYUCh. 17 - Prob. 17.10TYUCh. 17 - Prob. 17.11TYUCh. 17 - Prob. 1RQCh. 17 - Why must emitterfollower output stages be added to...Ch. 17 - Sketch a modified ECL circuit in which a Schottky...Ch. 17 - Explain the concept of series gating for ECL...Ch. 17 - Sketch a diodetransistor NAND circuit and explain...Ch. 17 - Explain the operation and purpose of the input...Ch. 17 - Sketch a basic TTL NAND circuit and explain its...Ch. 17 - Prob. 8RQCh. 17 - Prob. 9RQCh. 17 - Prob. 10RQCh. 17 - Explain the operation of a Schottky clamped...Ch. 17 - Prob. 12RQCh. 17 - Prob. 13RQCh. 17 - Sketch a basic BiCMOS inverter and explain its...Ch. 17 - For the differential amplifier circuit ¡n Figure...Ch. 17 - Prob. 17.2PCh. 17 - Prob. 17.3PCh. 17 - Prob. 17.4PCh. 17 - Prob. 17.5PCh. 17 - Prob. 17.6PCh. 17 - Prob. 17.7PCh. 17 - Prob. 17.8PCh. 17 - Prob. 17.9PCh. 17 - Prob. 17.10PCh. 17 - Prob. 17.11PCh. 17 - Prob. 17.12PCh. 17 - Prob. 17.13PCh. 17 - Prob. 17.14PCh. 17 - Prob. 17.15PCh. 17 - Prob. 17.16PCh. 17 - Prob. 17.17PCh. 17 - Prob. 17.18PCh. 17 - Consider the DTL circuit shown in Figure P17.19....Ch. 17 - Prob. 17.20PCh. 17 - Prob. 17.21PCh. 17 - Prob. 17.22PCh. 17 - Prob. 17.23PCh. 17 - Prob. 17.24PCh. 17 - Prob. 17.25PCh. 17 - Prob. 17.26PCh. 17 - Prob. 17.27PCh. 17 - Prob. 17.28PCh. 17 - Prob. 17.29PCh. 17 - Prob. 17.30PCh. 17 - Prob. 17.31PCh. 17 - Prob. 17.32PCh. 17 - Prob. 17.33PCh. 17 - For the transistors in the TTL circuit in Figure...Ch. 17 - Prob. 17.35PCh. 17 - Prob. 17.36PCh. 17 - Prob. 17.37PCh. 17 - Prob. 17.38PCh. 17 - Prob. 17.39PCh. 17 - Prob. 17.40PCh. 17 - Prob. 17.41PCh. 17 - Prob. 17.42PCh. 17 - Prob. 17.43PCh. 17 - Prob. 17.44PCh. 17 - Design a clocked D flipflop, using a modified ECL...Ch. 17 - Design a lowpower Schottky TTL exclusiveOR logic...Ch. 17 - Design a TTL RS flipflop.
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