Microelectronics: Circuit Analysis and Design
Microelectronics: Circuit Analysis and Design
4th Edition
ISBN: 9780073380643
Author: Donald A. Neamen
Publisher: McGraw-Hill Companies, The
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Chapter 13, Problem 13.15TYU
To determine

Value of I1,I2andVSG

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JFET Output Characteristics For the circuit in Figure 13, determine the output characteristics of the JFET for VGS = -6V. AO1=-6V. IDSS= 110mA, Vp -8V. Using the current equations for the linear and saturation regions, plot VDs (X-axis) vs. ID (y-axis) for the following AO0 values: 0, 0.2, 0.6, 1.0, 1.4, 1.6, 2.0, 2.5, 3.0, 4.0 5.0 V. For VDS (VGS-Vp) (linear region), use: For VDS (VGS-VP) (saturation region), use: Vp ID 2/pss (VGS -VP-VDS) VDS 2 ID = = loss (1 - Vas) ² Vp AOO GND AO1 J1 Ammeter Figure 13: JFET Output Characteristics Circuit Hint: Assuming a negligible voltage drop over the ammeter, it is safe to assume A00=VDs. Also, recognize that the saturation equation does not contain a VDs term. Take care not to drop the negative sign off of VGs or VP when you substitute the values into the equations.
Q. Choose the correct answer from the following: 2. A three-phase half-wave controlled converter is constructed using 3 SCR devices. The circuit is supplying an R load with a< 30°. As such, each SCR device would conduct for a) 60° each cycle b) 120° each cycle c) 180° each cycle d) 360° each cycle 4. A thyristor has a maximum allowable junction temperature of 120°C and the ambient temperature is 40°C. If thermal resistance is 1.6° C/W, the maximum allowable internal power dissipation is: a. 20 W b. 50 W c. 92 W d. 128 W 6. In reverse blocking state of a thyristor: a) junction J2 is in reverse bias and J1, J3 is in forward bias. b) junction J3 is in forward bias and J1, J2 in reverse bias. c) junction J1, J3 is in reverse bias and J2 is in forward bias. d) junction J1 and J2 is in forward bias and J3 is in reverse bias.
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Chapter 13 Solutions

Microelectronics: Circuit Analysis and Design

Ch. 13 - Prob. 13.11EPCh. 13 - Prob. 13.10TYUCh. 13 - Prob. 13.12TYUCh. 13 - Prob. 13.12EPCh. 13 - Prob. 13.13EPCh. 13 - Prob. 13.15EPCh. 13 - Prob. 13.15TYUCh. 13 - Consider the LF155 BiFET input stage in Figure...Ch. 13 - Describe the principal stages of a generalpurpose...Ch. 13 - Prob. 2RQCh. 13 - Prob. 3RQCh. 13 - Describe the operation and characteristics of a...Ch. 13 - Describe the configuration and operation of the...Ch. 13 - What is the purpose of the resistorin the active...Ch. 13 - Prob. 7RQCh. 13 - Prob. 8RQCh. 13 - Describe the frequency compensation technique in...Ch. 13 - Sketch and describe the general characteristics of...Ch. 13 - Prob. 11RQCh. 13 - Sketch and describe the principal advantage of a...Ch. 13 - Prob. 13RQCh. 13 - What are the principal factors limiting the...Ch. 13 - Consider the simple MOS opamp circuit shown in...Ch. 13 - Prob. 13.2PCh. 13 - Prob. 13.5PCh. 13 - Consider the input stage of the 741 opamp in...Ch. 13 - Prob. 13.7PCh. 13 - Prob. 13.8PCh. 13 - Prob. 13.10PCh. 13 - The minimum recommended supply voltages for the...Ch. 13 - Prob. 13.12PCh. 13 - Consider the 741 opamp in Figure 13.3, biased with...Ch. 13 - Prob. 13.14PCh. 13 - Consider the output stage of the 741 opamp shown...Ch. 13 - Prob. 13.16PCh. 13 - Prob. 13.19PCh. 13 - Prob. 13.20PCh. 13 - Prob. 13.21PCh. 13 - Prob. 13.22PCh. 13 - Prob. 13.23PCh. 13 - Prob. 13.24PCh. 13 - (a) Determine the differential input resistance of...Ch. 13 - An opamp that is internally compensated by Miller...Ch. 13 - The CMOS opamp in Figure 13.14 is biased at V+=5V...Ch. 13 - Prob. 13.34PCh. 13 - Consider the MC14573 opamp in Figure 13.14, with...Ch. 13 - Prob. 13.36PCh. 13 - Prob. 13.37PCh. 13 - Prob. 13.39PCh. 13 - Prob. 13.41PCh. 13 - In the bias portion of the CA1340 opamp in Figure...Ch. 13 - Prob. 13.57PCh. 13 - In the LF155 BiFET opamp in Figure 13.25, the...
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