Consider the JFET circuit in Figure 10.24. The transistor parametersare: I D s s 2 = 0.5 m A , I D s s 1 = 0.8 m A , V P 1 = V P 2 = − 2 V , and λ P 1 = λ P 2 = 0.15 V − 1 . Determine the minimum values of V S and V I such that Q 2 is biased inthe saturation region. What is the value of I O ? What is the output impedance looking into the drain of Q 2 ? (Ans. V S ( min ) = − 3 V , I O = 0.65 m A , V I ( min ) = − 3.2 V , r o = 1.09 k Ω )
Consider the JFET circuit in Figure 10.24. The transistor parametersare: I D s s 2 = 0.5 m A , I D s s 1 = 0.8 m A , V P 1 = V P 2 = − 2 V , and λ P 1 = λ P 2 = 0.15 V − 1 . Determine the minimum values of V S and V I such that Q 2 is biased inthe saturation region. What is the value of I O ? What is the output impedance looking into the drain of Q 2 ? (Ans. V S ( min ) = − 3 V , I O = 0.65 m A , V I ( min ) = − 3.2 V , r o = 1.09 k Ω )
Solution Summary: The author analyzes the output impedance of mathrmR_MathrO looking in to the drain of transistor.
Consider the JFET circuit in Figure 10.24. The transistor parametersare:
I
D
s
s
2
=
0.5
m
A
,
I
D
s
s
1
=
0.8
m
A
,
V
P
1
=
V
P
2
=
−
2
V
, and
λ
P
1
=
λ
P
2
=
0.15
V
−
1
. Determine the minimum values of
V
S
and
V
I
such that
Q
2
is biased inthe saturation region. What is the value of
I
O
? What is the output impedance looking into the drain of
Q
2
? (Ans.
V
S
(
min
)
=
−
3
V
,
I
O
=
0.65
m
A
,
V
I
(
min
)
=
−
3.2
V
,
r
o
=
1.09
k
Ω
)
Question 5
The following data were obtained from testing a 48-kVA 240/4800 V step up transformer.
Open-circuit test
Short-circuit test
Voltage (V)
240
150
Current (I)
2
10
Power (W)
120
600
Determine the equivalent circuit of the transformer as viewed from the primary side.
Ans: Rc = 480 ohm, Xm = 123.94 ohm, Reqp = 0.015 ohm, Xeqp = 0.034 ohm
From the following mass-spring system, obtain its transfer function and pole-zero
wwwwwwww wwww
diagram in MATLAB. Analyze how stability varies when entering values.
wwwww
(4)x1
▷ x(t)
M
f(t)
B
f(t) is the input variable and x(t) is the controlled variable.
R2
L3
C5
BRF_OUT
HH
Sine_OUT
100
1m
100n
C3
C4
100n
100n
Figure 9. Square to sine waveform converter circuit
How do we make sense of this? First, we note that R2 and C3 form a first order low pass filter and L3 and C4 form another low pass filter. Both low
pass filters have been set at the same cutoff frequency. The combination of both form a two stage filter to remove the high frequency content
present in the DAB signal. Capacitor C5 is used to remove any residual DC offset in the signal.
But let's just deal with the AC steady state response, which means that you don't need to know any of these details, and then can conveniently treat
this circuit as a blackbox.
What is the theoretical cutoff frequency for the RC and LC filters shown in Figure 9? Answer to within 1% accuracy.
(a) RC Filter cutoff frequency (f 1) =
kHz
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NMOS vs PMOS and Enhancement vs Depletion Mode MOSFETs | Intermediate Electronics; Author: CircuitBread;https://www.youtube.com/watch?v=kY-ka0PriaE;License: Standard Youtube License