VDD www Rsi CCI ww HH ww Rp R₂ EXERCISE PROBLEM Ex 4.4: Consider the circuit shown in Figure 4.14. Assume transistor parameters of VTN = 0.8 V, K=0.20 mA/V2, and λ = 0. Let VDD = 5 V, R; = R₁|| R₂ = 200 ks, and Rsi = 0. Design the circuit such that IDQ = 0.5 mA and the Q-point is in the center of the saturation region. Find the small-signal voltage gain. (Ans. Rp 2.76 ks, R₁ = 420 ks, R₂ = 382 ks, A₁ = -1.75)

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VDD
www
Rsi CCI
ww HH
ww
Rp
R₂
Transcribed Image Text:VDD www Rsi CCI ww HH ww Rp R₂
EXERCISE PROBLEM
Ex 4.4: Consider the circuit shown in Figure 4.14. Assume transistor parameters
of VTN
= 0.8 V, K=0.20 mA/V2, and λ = 0. Let VDD = 5 V, R; = R₁|| R₂ =
200 ks, and Rsi = 0. Design the circuit such that IDQ = 0.5 mA and the Q-point
is in the center of the saturation region. Find the small-signal voltage gain.
(Ans. Rp 2.76 ks, R₁ = 420 ks, R₂ = 382 ks, A₁ = -1.75)
Transcribed Image Text:EXERCISE PROBLEM Ex 4.4: Consider the circuit shown in Figure 4.14. Assume transistor parameters of VTN = 0.8 V, K=0.20 mA/V2, and λ = 0. Let VDD = 5 V, R; = R₁|| R₂ = 200 ks, and Rsi = 0. Design the circuit such that IDQ = 0.5 mA and the Q-point is in the center of the saturation region. Find the small-signal voltage gain. (Ans. Rp 2.76 ks, R₁ = 420 ks, R₂ = 382 ks, A₁ = -1.75)
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