Th is exercise is intended to help you understand the relationship between forwarding, hazard detection, and ISA design. Problems in this exercise refer to the following sequence of instructions, and assume that it is executed on a 5-stage pipelined datapath:add r5,r2,r1lw r3,4(r5)lw r2,0(r2)or r3,r5,r3sw r3,0(r5)> If there is no forwarding or hazard detection, insert nops to ensure correct execution.> Repeat above step, but now use nops only when a hazard cannot be avoided by changing or rearranging these instructions. You can assume register R7 can be used to hold temporary values in your modifi ed code.> If the processor has forwarding, but we forgot to implement the hazard detection unit, what happens when this code executes?
Th is exercise is intended to help you understand the relationship between forwarding, hazard detection, and ISA design. Problems in this exercise refer to the following sequence of instructions, and assume that it is executed on a 5-stage pipelined datapath:
add r5,r2,r1
lw r3,4(r5)
lw r2,0(r2)
or r3,r5,r3
sw r3,0(r5)
> If there is no forwarding or hazard detection, insert nops to ensure correct execution.
> Repeat above step, but now use nops only when a hazard cannot be avoided by changing or rearranging these instructions. You can assume register R7 can be used to hold temporary values in your modifi ed code.
> If the processor has forwarding, but we forgot to implement the hazard detection unit, what happens when this code executes?
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