How many bits are required for addressing (i.e. what is the size, in bits, of an address)? 30 bits O 20 bits O 64 bits O 16 bits 32 bits
How many bits are required for addressing (i.e. what is the size, in bits, of an address)? 30 bits O 20 bits O 64 bits O 16 bits 32 bits
Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
Problem 1PE
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![How many bits are required for addressing (i.e. what is the size,
in bits, of an address)?
30 bits
20 bits
64 bits
16 bits
32 bits](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2Ff9a640bd-2c32-4021-a569-c95421bde750%2Fc0cb0289-02c9-4db8-8928-77cfec2ae0e9%2Fpiyhycn_processed.jpeg&w=3840&q=75)
Transcribed Image Text:How many bits are required for addressing (i.e. what is the size,
in bits, of an address)?
30 bits
20 bits
64 bits
16 bits
32 bits
![A certain ISA has a 32-bit word size, uses single word
(32-bit) instructions, has 66 opcodes, 64 registers, and
1G of byte-addressable memory. One group of
instructions in this ISA takes the form:
OPCODE | DESTINATION REGISTER | SOURCE
REG. | Flag | IMMEDIATE VALUE
Or
OPCODE | DESTINATION REGISTER | SOURCE
REG. 1 | Flag | SOURCE REG. 2
A single bit in the instruction ("Flag") is used to
differentiate these two addressing modes.
Another group of instructions takes the form
OPCODE | SOURCE/DESTINATION REGISTER |
PC OFFSET
Where PC Offset is the 2's complement "distance" from
the current PC to the labelled location.](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2Ff9a640bd-2c32-4021-a569-c95421bde750%2Fc0cb0289-02c9-4db8-8928-77cfec2ae0e9%2Fb8ep8o_processed.jpeg&w=3840&q=75)
Transcribed Image Text:A certain ISA has a 32-bit word size, uses single word
(32-bit) instructions, has 66 opcodes, 64 registers, and
1G of byte-addressable memory. One group of
instructions in this ISA takes the form:
OPCODE | DESTINATION REGISTER | SOURCE
REG. | Flag | IMMEDIATE VALUE
Or
OPCODE | DESTINATION REGISTER | SOURCE
REG. 1 | Flag | SOURCE REG. 2
A single bit in the instruction ("Flag") is used to
differentiate these two addressing modes.
Another group of instructions takes the form
OPCODE | SOURCE/DESTINATION REGISTER |
PC OFFSET
Where PC Offset is the 2's complement "distance" from
the current PC to the labelled location.
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