HELP! You have a virtual memory system with a two-entry TLB, a 2-way set associative cache and a page table for a process P. Assume cache blocks of 8 bytes and page size of 16 bytes. In the system below, main memory is divided up into blocks, where each block is represented by a letter. Two blocks equals one frame. a)Virtual address page 3, offset 7 results in a TLB hit or miss? If TLB hit, what’s the main memory frame? If TLB miss, would it result in a page fault? If not a page fault, what’s the main memory frame and what the physical address in binary? Explain your answers. b)Virtual address page 0, offset 1310 results in a TLB hit or miss? If TLB hit, what’s the main memory frame? If TLB miss, would it result in a page fault? If not a page fault, what’s the main memory frame? Explain your answers. c)Virtual address page 2, offset 3 results in a TLB hit or miss? If TLB hit, what’s the main memory frame? If TLB miss, would it result in a page fault? If not a page fault, what’s the main memory frame? Explain your answers.
HELP!
You have a virtual memory system with a two-entry TLB, a 2-way set
associative cache and a page table for a process P. Assume cache blocks of 8 bytes and page size
of 16 bytes. In the system below, main memory is divided up into blocks, where each block is
represented by a letter. Two blocks equals one frame.
a)Virtual address page 3, offset 7 results in a TLB hit or miss? If TLB hit, what’s the main
memory frame? If TLB miss, would it result in a page fault? If not a page fault, what’s the main
memory frame and what the physical address in binary? Explain your answers.
b)Virtual address page 0, offset 1310 results in a TLB hit or miss? If TLB hit, what’s the
main memory frame? If TLB miss, would it result in a page fault? If not a page fault, what’s the
main memory frame? Explain your answers.
c)Virtual address page 2, offset 3 results in a TLB hit or miss? If TLB hit, what’s the main
memory frame? If TLB miss, would it result in a page fault? If not a page fault, what’s the main
memory frame? Explain your answers.
![0
4
3
1
TLB
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Frame
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0
2
1
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Page Table
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Cache
Frame
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7
Main Memory
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Block
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2
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Page
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1
2 {
3 {
{
{
Block
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
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B
C
D
E
F
G
H
I
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M
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P
15
Virtual Memory
For Process P
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