Our system is using virtual memory and has 48-bit virtual address space and 32-bit physical address space. Page size is 16 KiB. (a) How many entries are needed for a single-level page table? What does the two-level page table look like if the part of the virtual address which identifies the page number is split into two fields of equal size? (b) Our system also has the TLB (Translation Lookaside Buffer) with 128 entries. We run the following program which reads 32-bit integers from an array of size 200 000: int[] t = new int [200000]; for (int i=399; i>=0; i--) { for (int j = 0; j<500; j++) { } } // we access t[i+ 400 * j ] How efficient is the TLB in this case? More precisely, how many times will a TLB miss occur (resulting in page table lookup)? Assume that the TLB is initially empty.

Our system is using virtual memory and has 48-bit virtual address space and 32-bit physical address space. Page size is 16 KiB. (a) How many entries are needed for a single-level page table? What does the two-level page table look like if the part of the virtual address which identifies the page number is split into two fields of equal size? (b) Our system also has the TLB (Translation Lookaside Buffer) with 128 entries. We run the following program which reads 32-bit integers from an array of size 200 000: int[] t = new int [200000]; for (int i=399; i>=0; i--) { for (int j = 0; j<500; j++) { } } // we access t[i+ 400 * j ] How efficient is the TLB in this case? More precisely, how many times will a TLB miss occur (resulting in page table lookup)? Assume that the TLB is initially empty.

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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Our system is using virtual memory and has 48-bit virtual address space and 32-bit physical address space. Page size is 8 KiB. (a) How many entries are needed for a single-level page table? What does the two-level page table look like if the part of the virtual address which identifies the page number is split into two fields, such that the second part has 3 bits more than the first part? (b) Our system also has the TLB (Translation Lookaside Buffer) with 64 entries. We run the following program which reads 32-bit integers from an array of size 200 000: int[] t = new int [200000]; for (int i=19; i>=0; i--) { } for (int j = 0; j<10000; j++) { // we access t[ i + 20 * j] } How efficient is the TLB in this case? More precisely, how many times will a TLB miss occur (resulting in page table lookup)? Assume that the TLB is initially empty.
Consider a paging system with the page table stored in memory. A. If a memory reference takes 200 nanoseconds, how long does a paged memory reference take? B. If we add associative registers, and 75 percent of all page-table references are found in the associative registers, what is the effective memory reference time? (Assume that finding a page-table entry in the associative registers takes zero time, if the entry is there.)
Recently, a computer system was designed by Adam. He considered a paging system assured with a page table stored up in the memory. It was observed that when he used the associative registers, the references made to page tables were around 80 percent. During the whole process, the memory reference taken was about 150 ns. Adam was not sure what was the time taken for paged memory reference. Your task is to help Adam to compute the time for paged memory reference and the time taken for effective memory reference.
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The IBM System/370 architecture uses a two-level memory structure and refers to the two levels as segments and pages, although the segmentation approach lacks many of the features described earlier in this chapter. For the basic 370 architecture, the page size may be either 2 Kbytes or 4 Kbytes, and the segment size is fixed at either 64 Kbytes or 1 Mbyte. For the 370/XA and 370/ESA architectures, the page size is 4 Kbytes and the segment size is 1 Mbyte. Which advantages of segmentation does this scheme lack? What is the benefit of segmentation for the 370?
consider you are looking at a virtual memory of size 1 GiB also a physical memory of size 128 KiB and a page size equal to 8 KiB. FIgure out how many bits are used to specify a virtual page number?
in 8 bit computer system paging is used. how many different virtual memory addresses total? if there are 64 memory address in frame, and page number needs p bits, what is value of p?
Consider a system with 64-bit address that supports multi-level page tables with two levels. The page size is 16KB and each page table entry (PTE) is 8B. PTE1# PTE2# offset How many bits are used for PTE1, PTE2 and the offset in the virtual address?
16-bit virtual addresses
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Consider a logical address space of 1024 pages of 2048 words each, mapped onto a physical memory of 4096 frames. a. How many bits are there in the logical address? b. How many bits are there in the physical address? Show the steps of your solution.
Consider a demand-paging system with a paging disk that has an average access/transfer time of 50 ms. Addresses are translated through a page table in main memory, with an access time of 500 ns per memory access. Thus, each memory reference through the page table takes two accesses. To improve this time, we have added a TLB that reduces access time to one memory reference if the page-table entry is in the TLB. Assume that 80% of the accesses are in the TLB and that, of those remaining, 15% (or 3% of the total) cause page faults. We assume that the TLB access time is 20 ns. What is the effective access time?