Our system is using virtual memory and has 48-bit virtual address space and 32-bit physical address space. Page size is 16 KiB. (a) How many entries are needed for a single-level page table? What does the two-level page table look like if the part of the virtual address which identifies the page number is split into two fields of equal size? (b) Our system also has the TLB (Translation Lookaside Buffer) with 128 entries. We run the following program which reads 32-bit integers from an array of size 200 000: int[] t = new int [200000]; for (int i=399; i>=0; i--) { for (int j = 0; j<500; j++) { } } // we access t[i+ 400 * j ] How efficient is the TLB in this case? More precisely, how many times will a TLB miss occur (resulting in page table lookup)? Assume that the TLB is initially empty.

Our system is using virtual memory and has 48-bit virtual address space and 32-bit physical address space. Page size is 16 KiB. (a) How many entries are needed for a single-level page table? What does the two-level page table look like if the part of the virtual address which identifies the page number is split into two fields of equal size? (b) Our system also has the TLB (Translation Lookaside Buffer) with 128 entries. We run the following program which reads 32-bit integers from an array of size 200 000: int[] t = new int [200000]; for (int i=399; i>=0; i--) { for (int j = 0; j<500; j++) { } } // we access t[i+ 400 * j ] How efficient is the TLB in this case? More precisely, how many times will a TLB miss occur (resulting in page table lookup)? Assume that the TLB is initially empty.

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

See similar textbooks

Related questions

Q: In comparison to straight translation, what are the benefits of using segmented memory address…

A: Segmented memory address translation offers greater flexibility compared to straight translation. In…

Q: Suppose a computer using direct mapped cache has 4M byte of byte-addressable main memory, and a…

A: Computer memory is a device that stores data and allows us to retrieve it when needed. Primary…

Q: Our system is using virtual memory and has 32-bit virtual address space and 24-bit physical address…

A: (a) To address the split page number configuration of a two-level page table, one must be aware of…

Q: In a 64-bit machine, with 2 GB RAM, and 8 KB page size, how many entries will be there in the page…

A: Introduction :Given , 64 bit machine ram size = 2 GB page size = 8 KBWe have asked for the number of…

Q: Let's pretend for a moment that we have a byte-addressable computer with 16-bit main memory…

A: The hierarchy of virtual memory in current computer systems is a sophisticated network of caches and…

Q: A computer system with paging-based memory management, whose architecture allows for a 4GB virtual…

A: According to the information provided in the initial question, we must determine the amount of space…

Q: Problems 3. A segmented memory has paged segments. Each virtual address has a 2- bit segment number,…

A: Physical Address SpaceThe linear address has 2-bit segment number, 2-bit page numberand 11-bit…

Q: Suppose we have a 16-bit main memory address and 32 blocks of cache memory accessible on a…

A: Organisation of virtual memory: The RAM and caches that make up the memory hierarchy in modern…

Q: What advantages do segmented memory address translation provide over a straight translation?

A: The question has been answered in step2

Q: Suppose that an MMU has page table entries like the ones shown at right (formatted as in the slides…

A: The solution of the above question is:

Q: Given a 16 bit virtual address space and a 10 bit low-order offset how many bytes is each page.

Q: A system has 4-kB pages, a 48-bit virtual address space, and a 33-bit physical address space.…

A: Lets see the solution in the next steps

Concept explainers

Computer Fundamentals

The computer is termed computation. For calculating or computing something the device that has been used is known as the computer. Or we can say that for performing a fast arithmetic operation the device that has been used is a computer. Storing, processing, and retrieving are the main features of a computer. 

Question

Our system is using virtual memory and has 48-bit virtual address space and 32-bit
physical address space. Page size is 16 KiB.
(a) How many entries are needed for a single-level page table?
What does the two-level page table look like if the part of the virtual address which
identifies the page number is split into two fields of equal size?
(b) Our system also has the TLB (Translation Lookaside Buffer) with 128 entries. We
run the following program which reads 32-bit integers from an array of size 200 000:
int[] t = new int [200000];
for (int i=399; i>=0; i--) {
for (int j=0; j<500; j++) {
}
}
// we access t[ i +400 * j ]
How efficient is the TLB in this case? More precisely, how many times will a TLB
miss occur (resulting in page table lookup)? Assume that the TLB is initially empty.

Expert Solution

This question has been solved!

Explore an expertly crafted, step-by-step solution for a thorough understanding of key concepts.

SEE SOLUTION Check out a sample Q&A here

Step 1: Here is introduce number of entries are needed for a single-level page table:

VIEW

Step 2: Here is introduce number of entries are needed for a two-level page table:

VIEW

Step 3: Here is describe how many TLB miss will occur:

VIEW

Solution

VIEW

Step by step

Solved in 4 steps

SEE SOLUTION Check out a sample Q&A here

Knowledge Booster

Learn more about

Need a deep-dive on the concept behind this application? Look no further. Learn more about this topic, computer-science and related others by exploring similar questions and additional content below.

Similar questions

The IBM System/370 architecture uses a two-level memory structure and refers to the two levels as segments and pages, although the segmentation approach lacks many of the features described earlier in this chapter. For the basic 370 architecture, the page size may be either 2 Kbytes or 4 Kbytes, and the segment size is fixed at either 64 Kbytes or 1 Mbyte. For the 370/XA and 370/ESA architectures, the page size is 4 Kbytes and the segment size is 1 Mbyte. Which advantages of segmentation does this scheme lack? What is the benefit of segmentation for the 370?
consider you are looking at a virtual memory of size 1 GiB also a physical memory of size 128 KiB and a page size equal to 8 KiB. FIgure out how many bits are used to specify a virtual page number?
in 8 bit computer system paging is used. how many different virtual memory addresses total? if there are 64 memory address in frame, and page number needs p bits, what is value of p?
Consider a system with 64-bit address that supports multi-level page tables with two levels. The page size is 16KB and each page table entry (PTE) is 8B. PTE1# PTE2# offset How many bits are used for PTE1, PTE2 and the offset in the virtual address?
16-bit virtual addresses
Consider a demand-paging system with a paging disk that has an average access/transfer time of 50 ms. Addresses are translated through a page table in main memory, with an access time of 500 ns per memory access. Thus, each memory reference through the page table takes two accesses. To improve this time, we have added a TLB that reduces access time to one memory reference if the page-table entry is in the TLB. Assume that 80% of the accesses are in the TLB and that, of those remaining, 15% (or 3% of the total) cause page faults. We assume that the TLB access time is 20 ns. What is the effective access time?