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Consider the execution of the following MIPS code on a pipelined processor with a 5- 5-stage pipeline. This pipeline has MEM/WB forwarding only, a predict taken branch predictor, and branch completion in the MEM stage.              lw $s5, 0($s3) label1: beq $s5, $s4, label2 # not taken once, then taken              lw $s2, 0($s5)              beq $s2, $s4, label1 #taken              add $s3, $s2, $s3  label2: sw $s3, 0($s5)  Draw the pipeline execution diagram for this code. How many cycles are needed? Include all cycles from fetching the lw $s5 through the completion of the last instruction executed.

Consider the execution of the following MIPS code on a pipelined processor with a 5- 5-stage pipeline. This pipeline has MEM/WB forwarding only, a predict taken branch predictor, and branch completion in the MEM stage.              lw $s5, 0($s3) label1: beq $s5, $s4, label2 # not taken once, then taken              lw $s2, 0($s5)              beq $s2, $s4, label1 #taken              add $s3, $s2, $s3  label2: sw $s3, 0($s5)  Draw the pipeline execution diagram for this code. How many cycles are needed? Include all cycles from fetching the lw $s5 through the completion of the last instruction executed.

Computer Networking: A Top-Down Approach (7th Edition)
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
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Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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Consider the execution of the following MIPS code on a pipelined processor with a 5- 5-stage pipeline. This pipeline has MEM/WB forwarding only, a predict taken branch predictor, and branch completion in the MEM stage. 

            lw $s5, 0($s3)

label1: beq $s5, $s4, label2 # not taken once, then taken 

            lw $s2, 0($s5) 

            beq $s2, $s4, label1 #taken 

            add $s3, $s2, $s3 

label2: sw $s3, 0($s5) 

Draw the pipeline execution diagram for this code. How many cycles are needed? Include all cycles from fetching the lw $s5 through the completion of the last instruction executed.

Cycle IF 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 6789 17 18 19 20 ID EX MEM WB
Transcribed Image Text:Cycle IF 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 6789 17 18 19 20 ID EX MEM WB
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