(b) Consider a system with multiple level memory as in Table Q520. Table Q52 (i) (ii) Component Cache Hit Rate Cache Hit Time Off Chip Cache Hit Rate Off Chip Cache Hit Time Main Memory Hit Rate Main Memory Hit Time Main Memory Miss Penalty Value 90% 5 ns 96% 10 ns 99.8% 60 ns 10 000 ns Calculate the Global Miss Rate for this system. Assume that the size of the Off Chip Cache is increased in a way that the Global Miss Rate is reduced up to 20%. Calculate the new value for Global Miss Rate and Global Hit Rate.

Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
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(b)
Consider a system with multiple level memory as in Table Q520.
Table Q52
(i)
(ii)
Component
Cache Hit Rate
Cache Hit Time
Off Chip Cache Hit Rate
Off Chip Cache Hit Time
Main Memory Hit Rate
Main Memory Hit Time
Main Memory Miss Penalty
Value
90%
5 ns
96%
10 ns
99.8%
60 ns
10 000 ns
Calculate the Global Miss Rate for this system.
Assume that the size of the Off Chip Cache is increased in a way that the Global
Miss Rate is reduced up to 20%. Calculate the new value for Global Miss Rate
and Global Hit Rate.
Transcribed Image Text:(b) Consider a system with multiple level memory as in Table Q520. Table Q52 (i) (ii) Component Cache Hit Rate Cache Hit Time Off Chip Cache Hit Rate Off Chip Cache Hit Time Main Memory Hit Rate Main Memory Hit Time Main Memory Miss Penalty Value 90% 5 ns 96% 10 ns 99.8% 60 ns 10 000 ns Calculate the Global Miss Rate for this system. Assume that the size of the Off Chip Cache is increased in a way that the Global Miss Rate is reduced up to 20%. Calculate the new value for Global Miss Rate and Global Hit Rate.
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