3. Two-bit ALU In this section, using a 2-bit adder, multiplexers, and other appropriate gates you will design a very simple 2-bit ALU that has the following specifications for input (7 bits) and output (3 bits): • 5 data input bits: 2-bit operand inputs, A = [A1A0] and B = [B1B0], and carry-in, CIN 2 control input bits: S1 and S2, which decide the operation to be performed • 3 data output bits: 2-bit output, R = [R₁Ro], and carry-out, COUT. The ALU function is as follows: 2 S₁ S2 Operation 0 0 ADDAB Result of operation R = A + B + CIN, (Add A with B including carry-in) COUT = carry from addition 0 1 INCRA R = A + 1, (Increment A) COUT carry from A+1 1 0 INCRB R=B+1, (Increment B) COUT carry from B+1 1 1 XORAB R = A + B, (Bitwise XOR of A and B) COUT = 0 The arithmetic operations are ADDAB, INCRA, and INCRB and the logical operation is XORAB. Note that a realistic ALU has a much larger word size (eg. 32 bits instead of 2 bits) and many more operations.
3. Two-bit ALU In this section, using a 2-bit adder, multiplexers, and other appropriate gates you will design a very simple 2-bit ALU that has the following specifications for input (7 bits) and output (3 bits): • 5 data input bits: 2-bit operand inputs, A = [A1A0] and B = [B1B0], and carry-in, CIN 2 control input bits: S1 and S2, which decide the operation to be performed • 3 data output bits: 2-bit output, R = [R₁Ro], and carry-out, COUT. The ALU function is as follows: 2 S₁ S2 Operation 0 0 ADDAB Result of operation R = A + B + CIN, (Add A with B including carry-in) COUT = carry from addition 0 1 INCRA R = A + 1, (Increment A) COUT carry from A+1 1 0 INCRB R=B+1, (Increment B) COUT carry from B+1 1 1 XORAB R = A + B, (Bitwise XOR of A and B) COUT = 0 The arithmetic operations are ADDAB, INCRA, and INCRB and the logical operation is XORAB. Note that a realistic ALU has a much larger word size (eg. 32 bits instead of 2 bits) and many more operations.
Chapter4: Processor Technology And Architecture
Section: Chapter Questions
Problem 9VE
Related questions
Question
Design the ALU and draw a logic diagram (including chip and pin numbers) of the resulting
circuit. If necessary, divide your diagram into a hierarchical structure. Your design
documentation should contain block diagram(s) showing functional blocks in your system,
truth tables, Karnaugh maps, and a logic diagram which should include chip and pin
numbers. Your design should make use of multiplexers and keep wiring to a minimum.
You may use the suggested approach below as a guideline for completing your design
One possible approach: Use one 2-bit adder to
produce results for the arithmetic operations of addition and incrementing. The addition
operation should have A and B presented to the inputs of the adder and the carry in bit
coming from the ALU CIN input. To increment A, one could feed A to one of the adder
inputs and “00” to the other input, while setting carry in of the adder to “1”. Incrementing
B could be produced similarly. Selecting these different inputs to feed the adder could be
accomplished with 2-bit 2 ́1 muxes with the select bit of the muxes set based on
appropriate logic with inputs S 1 and S 2 . The carry in of the adder can be set to an
appropriate value based on ALU inputs S 1 , S 2 , and C IN . The output R of the ALU can be
either the arithmetic result (coming from the adder) or the logical result (i.e., the bitwise
XOR of A and B). This selection can be done again using a 2-bit 2 ́1 mux, which can have
a select bit derived from inputs S 1 and S 2 . The output bit C OUT should also be controlled
based on inputs S 1 and S 2 . Part 74157 has 2 ́1 muxes that can be used to make the
appropriate selection of inputs to the adder and the output selection. (Note that the selection
of inputs to the adder could also be done using just gates, rather than muxes, but the wiring
is likely comparable for either approach.)
produce results for the arithmetic operations of addition and incrementing. The addition
operation should have A and B presented to the inputs of the adder and the carry in bit
coming from the ALU CIN input. To increment A, one could feed A to one of the adder
inputs and “00” to the other input, while setting carry in of the adder to “1”. Incrementing
B could be produced similarly. Selecting these different inputs to feed the adder could be
accomplished with 2-bit 2 ́1 muxes with the select bit of the muxes set based on
appropriate logic with inputs S 1 and S 2 . The carry in of the adder can be set to an
appropriate value based on ALU inputs S 1 , S 2 , and C IN . The output R of the ALU can be
either the arithmetic result (coming from the adder) or the logical result (i.e., the bitwise
XOR of A and B). This selection can be done again using a 2-bit 2 ́1 mux, which can have
a select bit derived from inputs S 1 and S 2 . The output bit C OUT should also be controlled
based on inputs S 1 and S 2 . Part 74157 has 2 ́1 muxes that can be used to make the
appropriate selection of inputs to the adder and the output selection. (Note that the selection
of inputs to the adder could also be done using just gates, rather than muxes, but the wiring
is likely comparable for either approach.)
![3. Two-bit ALU
In this section, using a 2-bit adder, multiplexers, and other appropriate gates you will
design a very simple 2-bit ALU that has the following specifications for input (7 bits) and
output (3 bits):
• 5 data input bits: 2-bit operand inputs, A = [A1A0] and B = [B1B0], and
carry-in, CIN
2 control input bits: S1 and S2, which decide the operation to be performed
• 3 data output bits: 2-bit output, R = [R₁Ro], and carry-out, COUT.
The ALU function is as follows:
2
S₁ S2 Operation
0
0
ADDAB
Result of operation
R = A + B + CIN,
(Add A with B including carry-in) COUT = carry from addition
0
1 INCRA
R = A + 1,
(Increment A)
COUT
carry from A+1
1
0 INCRB
R=B+1,
(Increment B)
COUT carry from B+1
1
1 XORAB
R = A + B,
(Bitwise XOR of A and B)
COUT = 0
The arithmetic operations are ADDAB, INCRA, and INCRB and the logical operation is
XORAB. Note that a realistic ALU has a much larger word size (eg. 32 bits instead of 2
bits) and many more operations.](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2Fa4911f27-66c6-498e-819a-c2eb45423514%2F1fff8fe7-c230-4ab1-8649-09f690dfcf7a%2Fklop4xp_processed.jpeg&w=3840&q=75)
Transcribed Image Text:3. Two-bit ALU
In this section, using a 2-bit adder, multiplexers, and other appropriate gates you will
design a very simple 2-bit ALU that has the following specifications for input (7 bits) and
output (3 bits):
• 5 data input bits: 2-bit operand inputs, A = [A1A0] and B = [B1B0], and
carry-in, CIN
2 control input bits: S1 and S2, which decide the operation to be performed
• 3 data output bits: 2-bit output, R = [R₁Ro], and carry-out, COUT.
The ALU function is as follows:
2
S₁ S2 Operation
0
0
ADDAB
Result of operation
R = A + B + CIN,
(Add A with B including carry-in) COUT = carry from addition
0
1 INCRA
R = A + 1,
(Increment A)
COUT
carry from A+1
1
0 INCRB
R=B+1,
(Increment B)
COUT carry from B+1
1
1 XORAB
R = A + B,
(Bitwise XOR of A and B)
COUT = 0
The arithmetic operations are ADDAB, INCRA, and INCRB and the logical operation is
XORAB. Note that a realistic ALU has a much larger word size (eg. 32 bits instead of 2
bits) and many more operations.
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