Exam2Spring18solutions

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EE306 — Introduction to Computing Spring 2018 Midterm Exam #2 Dr. Nina Telang (TAs: Aniket Deshmukh, Shruthi Krish) UT EID: (4 Printed Name: Tdﬂna Your signature is your pledge that you have not and will not cheat on this exam, nor help other students to cheat on this exam. Signature: Instructions: 1. 2. 3. 4. This is a 75 minute closed book, closed notes exam. No calculators or other electronic devices are allowed. Please refer to the LC-3 ISA sheet, the LC-3 data path, the LC-3 finite state machine state graph which has been attached to the exam. Please answer all questions neatly in the space provided. Problem # 1 /40 Problem # 2 /10 Problem # 3 /20 Problem # 4 /15 Problem # S /15 Nina K. Telang 1

1. [40 points] Answer the following short questions in the space provided. Write your final answer in the box. Please show your work (outside the box) wherever necessary. (M (ii) (iii) (iv) Nina K. Telang [4 points] Convert the following LC-3 assembly language instructions to machine (binary) instructions. (a) STR RO, R1, #-6 011 000 00){} |0 o (b) TRAP x25 11y 0000 00l0 0lo| [4 points] The instructions below at the memory addresses indicated are executed. What is the PC of the next instruction? x301F: 0101 000 111100000 x3020: 0000 010 111111111 X3020 [4 points] Say we have a memory consisting of 256 locations, and each location contains 16 bits. (a) How many bits are required for the address? % (b) If we use the PC-relative addressing mode, and want to control transfer between instructions 20 locations away, how many bits of a branch instruction are needed to specify the PC-relative offset? 6 [4 points] We propose a change to the TRAP instruction such that it looks like this: Bits[15:12] : 1111 Bits[11:6] : 000000 2 - 6 4 Bits[5:0] : trap number i How many locations must the TRAP vector table hold?

(v) [4 points] Refer to the LC-3 state machine graph (attached to the exam). Write (in order) all the micro-instructions needed (after the decode phase) in the execution of the LDI instruction. M «— Pc+0H—M‘1 oL e— M [mAe] M AL e WmbR Mo &— {V\i(V\A'll‘] DL 2— mMmdl (vi) [4 points] How many accesses to memory do the following instructions make during processing? Assume that the instruction is already in the IR. Instruction # of read/write accesses to memory STI 2 LEA 0 JSR 0 LDR \ (vii) [4 points] Consider the following short program. What are the values (write them in hex) in registers RO, R1, R2, R3? .ORIG x3000 LD RO, space = LDI R1, space e X 30 00 LDR R2,RO, #4 -y i R1 = LEA R3, space 7\ 200 q' HALT = R2 x FO 25 space FILL %3000 R3= .END ¥ 300 s (viii) [2 points] Circle the correct choice below for the following statement. When the KBSR ready bit is set, it implies that the keyboard is disabled. FALSE Nina K. Telang

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(ix) [6 points] Create the symbol table for the following LC-3 assembly program. .ORIG x50FF ; This is a program for Exam2 Problem 1{ix) ; ONE JFILL x2201 TWO JFILL x6440 HALT PTR .FILL x3000 msg STRINGZ “Be Happy!” space BLKW x10 number FHL x10 .END Symbol Address ONE KGOFF Two x5 jop pte X9 102 sh 2103 spdke X510D Au mbon % 51D (x) [4 points] Consider a new LC-3 instruction: MOV DR, SR which makes a copy of the source register SR into the destination register DR. Which LC-3 instruction (from the existing LC-3 ISA) can achieve the same result? Abp dR, SR, 3F0 Nina K. Telang

2. [10 points] Consider the LC-3 assembly program below. Determine the time it takes to execute the program given that the LC-3 clock frequency is 1 GHz. Furthermore the memory access to the LC-3 memory is slow, taking 5 cycles (not 1 cycle) for every memory read or write. Hint: Refer to the LC-3 state graph given at the end of this exam. {ORIG x3500 LD RO, POINTER LDR R1, RO, #0 ADD R1,R1,R1 STR R1, RO, #1 POINTER CFILL x3800 Use new FSmM slde fwrbv % o ¢Slue Nam Nina K. Telang 5

3. [20 points] Below is an incomplete trace of 3 instructions. The first instruction is at x3000. You can assume none of the instructions executed are STI or LDI. The table has two rows per instruction executed. The first row of each pair shows the contents after the fetch phase of the corresponding instruction, and the second row of each pair shows the contents after that instruction completes. Your task is to determine the 3 instructions. You are given all the information you need to determine these 3 instructions. Your answer should be in hex format. pc |MaR |MDR [Ro |R1 [R2 |R3 R4 [R5 |Rre [mr7 mstmm'_‘— X3001 | x3000 x1234 | x3200 |x3000 |xFO12 |xEEFF | xB77E |x4206 |x8000 | [ x3001 [ x4200 x1234 [x3200 |x481D |xFO12 |xEEFF |xB77E |x4206 |x8000 [|x3002 | x3001 |x3400 |x1234 |x3200 |x481D |xFo12 |xEEFF |xB77E |x4206 |=x8000 | | x3002 [x3002 |x481D [x1234 |x3200 [x481D [xFo12 |xEEFF |xB77E [x4206 |x8000 i _; x3003 | x3002 x3020 Instructions: x3000: _LD& R2, Rb - onoolfodiolio = % 65BIA x3001: 6T R2, 0 = ng 00 x3002: S %D = A4® > Nina K. Telang 6

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4. [15 points] The following program should left shift each element in the 10- element array starting at x4000. The program must store the left-shifted element in the array at the same place. However, there are 4 bugs in the program. Your task is to find these bugs, and identify them as either assemble-time or run-time bugs. The instruction number is given in the comments. Please refer to that number when you list the error in the table given below. ORIG x3000 LD RO, Array s (1) AND R7, R7,#0 5(2) ADD R7, R7, #10 5 (3) loop LDR R1, RO, #0 3 (4) JSR LeftShift 5 (5) STR R1, RO, #0 5 (6) ADD RO, RO, #1 5 (D ADD R7, R7, #-1 3 (8) BRzp loop 3 (9) HALT ; (10) array .FILL x4000 ;(11) LeftShift sInputs = R1 ;Outputs = R1 sFunction = Left shifts the input once ADD R1, R1 5 (12) RET 5 (13) .END 3 (14) Assemble-Time Bugs Run-Time Bugs \ () No label " drcay (2) P71 vsed a5 counte. | bukt \J ; (12) Needs 2 souwrcen do odd needed F’( linkad e (61) Wil (o throuch [oop ? i -‘F\}MeS Cnof lO) Nina K. Telang 7

5. [15 points] The flow chart (or pseudo code) for routine named GETTen is shown below. This routine gets 10 characters as input from the keyboard, echoes them back to the monitor (without any spaces or newlines), and also stores them as an array whose starting address is in register RO. This routine cannot use any of the LC-3 TRAPs. Your task is to translate the marked boxes into LC-3 assembly code. The return to. Store RO Store R1 Store R2 Yes Clear R2 Add 10 to R2 S~ * indicates where the arrow at the end of the flow chart needs to ; LC3 assembly code M Rz, 02 FFO oy 2, 2, O * Load RO Load R1 Load R2 No 4 Return Poll the KBSR, and when the ready bit is 1, then read the KBDR and load character into R1. Store the character (in R1) in array (pointer is R0) | Increment RO Decrement R2 . Nina K. Telang v /’ looP ; LC3 assembly code I R, KBS bezp Loof L IbT @i, K8dDPK Ste pi, R0 Fo ; Given pseudo ops .FILL xFE00 .FILL xFE02 KBSRPtr KBDRPtr