ELE 404 - Lab 4

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Toronto Metropolitan University *

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404

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Electrical Engineering

Date

Apr 3, 2024

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pdf

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9

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Course Title: Electronic Circuits I Course Number: ELE404 Semester/Year (e.g.F2016) W2024 Instructor: Fei Yuan Assignment/Lab Number: Lab 4 Assignment/Lab Title: Wave Shaping Circuits : Submission Date March 3, 2024 Due Date: March 3, 2024 Student LAST Name Student FIRST Name Student Number Section Signature* Patel Rishi 501176824 10 R.P. Sarker Arnab 501213296 10 A.S *By signing above you attest that you have contributed to this written lab report and confirm that all work you have contributed to this lab report is your own work. Any suspicion of copying or plagiarism in this work will result in an investigation of Academic Misconduct and may result in a “0” on the work, an “F” in the course, or possibly more severe penalties, as well as a Disciplinary Notice on your academic record under the Student Code of Academic Conduct, which can be found online at: https://www.torontomu.ca/content/dam/senate/policies/pol60.pdf
Table Of Content 1. Introduction………………………………………3 2. Objectives…………………………………………3 3. Circuit Under Test………………………………...3 4. Experimental Results……………………………..5 5. Conclusions and Remarks………………………..8 6. Appendix: Pre-Lab and TA Copy of Results…….9 Introduction: The following lab report is for Wave Shaping Circuits, which was conducted on February 16th, 2024. The TA signed off on the pre-lab graphs, calculations made which have been included in
the appendix. Objectives: The experiment aimed to identify the shape of an input signal waveform by using diodes in different circuit demonstrations. The numerous waveforms were generated as a result of the nonlinear voltage-current characteristics of diodes, a behaviour not exhibited by linear circuit components. Circuit Under Evaluation: The following schematics represent circuits examined in the lab. The oscilloscope will be utilized to determine the waveform characteristics depicted in each graph. Each circuit comprises multiple elements arranged in a similar configuration. The inclusion of capacitors in Figure 1.3 stands as the primary distinction in configuration among the circuits. Figure 1.1: Wave-shaping circuit in which the DC voltages are obtained from the voltage dividing network
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Figure 1.2: Wave-shaping circuit of Figure 1.1 in which R3 - R5 have been made 10 times larger Figure 1.3: Modified wave-shaping circuit with resistances R3-R5 made 10 times larger and bypassed by electrolytic capacitors.
Experimental Results: Figure 1.4: The Represents Graph E1(A) Figure 1.5: The Represents Graph E1(B)
Figure 1.6: The Represents Graph E2(A) Figure 1.7: The Represents Graph E2(B)
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Figure 1.8: The Represents Graph E3(A) Figure 1.9: The Represents Graph E3(B)
Conclusions and Remarks: C1. Using a symmetrical triangular periodic waveform would result in an output voltage resembling a symmetrical sinusoidal graph. This is because two diodes are forward biased and two diodes are reverse biased, ensuring a constant output voltage. However, due to the voltage drop across the diodes and the resistor, the waveform would appear sinusoidal rather than triangular. Diodes act as voltage regulators, ensuring that the variation in voltage does not occur rapidly. C2. Upon examining graphs P1 and P3(B), it becomes evident that they share a considerable similarity. This resemblance can be attributed to the matching ratio of both resistors within the circuits. Both graphs exhibit analogous polarities in their output and input voltages, with waveforms resembling a tangent inverse function. However, discrepancies arise due to the expected voltage drop of 0.7V across the diodes. Notably, both graphs level off at approximately +/- 4V, contrary to the predicted voltage drop. In summary, it can be concluded that both graphs share a similar nature overall. C3. When comparing the 3 graphs, they are similar in shape but have a different voltage peak value while they all have similar input voltages. Graphs P1 and P5(b) have a very similar voltage output max and min values while P6(b) has a value further off from it. The discrepancies come from the tolerance values from the resistor and capacitor, as well as human error such as circuit power load not being perfect. The main consideration for the selection of the voltage-dividing resistances was based on KCL calculations in the prelab from the power supply values and current specifications that were given, and is why 5(b) had similar values but P6(b) had different larger resistance values leading to different Vo values. C4. When comparing Graph P1 with Graph P6(b) and Graph P7(b) all graphs have a similar shape, but P1 and P6(b) have different voltage output peak values. P7(b) and P1 have similar positive Vo values, but min voltage is quite different as well as P7 has a bigger increase in slope. The bypass capacitor essentially works to reduce irrelevant AC values in order to create the DC signal stronger, which is what the end goal is. This is what the capacitor in P7(b) does, which makes it look more linear than the other graphs, which is what the function of the capacitor is - to decrease the ripple voltage and make it as DC as possible. C5. When comparing the 3 graphs, they are similar in shape but some have different voltage peak values but similar Vi values. Graphs P1 and E1(b) have similar Vo and Vi peak values as well as
E1(b) all around 4V. The peak values for E2(b) and E3(b) were similar around 4.8V. The Vo and Vi values describe a relationship between these graphs showing that the Vo peak values differ for all the graphs while the Vi peaks are all very similar. Possible discrepancies would be resistance and capacitor tolerance values being different, as well as human error such as power output changes in the circuit. Appendix: Pre-Lab and TA Copy of Results
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