Electronic Devices and Circuits II- Lab 4_Quraiz2

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Electronic Devices and Circuits II – 3EJ4 Lab. #4 – Feedback Circuits Zuhaib Quraishi - Quraiz2 – 400306494 Date Submitted : 19/11/2023

Part 1: Negative Feedback Amplifier For the non-inverting amplifier designed, answer the following questions with simulated and measured data and discuss any discrepancy between the simulation and measurement results. Q1. (10 Points) (1) Based on the simulation data obtained in Step 1.2, what is the low- frequency (i.e., f = 100 Hz) voltage gain in dB for the first stage differential amplifier Ad1 , the second state CE amplifier Ad2 , and the third stage CC amplifier Ad3 , respectively for the differential-mode signal? Based on the simulation data obtained in step 1.2, the lowest frequency voltage gain for the first stage differential amplifier is 7.38dB, for the second state CE amplifier the gain is 70.05 dB, and for the third stage CC amplifier the gain is 0.00 dB. Figure 1: The gain for the amplifiers (dB) with the lowest frequency (Hz) (Step 1.2) (2) What is the overall voltage gain for the differential-mode signal? The overall voltage gain for the differential-mode signal is 77.43dB as it is the sum of all the gains (7.38dB + 70.05dB + 0.00dB = 77.42dB). (3) Which input (V1 or V2) is the non-inverting input of the operational amplifier? The non-inverting input of the operational amplifier is V2. As it can be seen in the figure below Vo and V2 are in phase with each other. Whereas V1 is not in phase. Figure 2: The phase for the amplifiers (Step 1.2) (4) What is the upper 3-dB frequency f H of the amplifier? The upper 3-dB frequency occurs when the phase shift is at 45 degrees, from the value of 179 degrees, the phase shift is found at 134 degrees (179 – 45 = 134). When analyzing the frequency at this phase the lower 3-dB frequency was found to be approximately 6338.4 Hz. Figure 3: The lower 3-dB frequency at a phase of 134 degrees (Step 1.2)

Q2. (5 Points) Compare the simulated differential-mode gain Ad1 found in Q1 and the simulated gain Ad in Q5 of Lab 3. What causes these two gains to be so different from each other for the same differential amplifier? The simulated differential-mode gain Ad1 found in Q1 is 7.38 dB, and the simulated gain in Q5 of lab 3 is found to be around 70.07 dB. The difference can be due to the different output resistance of both designs, the CE amplifiers input impedance is about rπ which is smaller compared with the output resistance of the current mirror and Q2. Since the resistances are connected in parallel at the output, the smaller rπ controls the effective load resistance resulting in the substantial drop in gain from Ad1 to the Ad in lab 3. In addition, the feedback from the emitters of the PNP BJT’s in the current mirror affect the collector current at the output of the amplifier. These could be the reasons behind the significant drop in the voltage gain. Q3. (5 Points) Based on the simulated results obtained in Steps 1.2 and 1.3, what are the input resistance Rin and the output resistance Ro of the Op-Amp? In step 1.2 the input resistance is determined to be 8157.3 Ω and the output resistance is 460.9 Ω as seen in the figures below. Figure 4: The input resistance of the op-amp (Step 1.2) Figure 5: The output resistance of the op-amp (Step 1.3) Q4. (10 Points) (1) Based on the simulated and measured results from Steps 1.6 and 1.13, plot the simulated and measured output voltages Vo vs. time characteristics at 1 kHz. Figure 6: The simulated output voltage vs time characteristics at 1 kHz (Step 1.6) 0.15 0.151 0.152 0.153 0.154 0.155 0.156 0 0.001 0.002 0.003 0.004 0.005 0.006 Vo (Volt) Time (s) Vo vs. Time Characteristics

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Figure 7 & 8: The measured output voltage vs time characteristics at 1 kHz (Step 1.13) (2) Calculate the simulated and measured peak-to-peak voltage Vpp, the AC amplitude Vp, and the dc voltage Vdc of Vo, and compare the simulation and measurement results. Simulated: Measured: Peak to Peak Vpp = 0.155 – 0.151 = 4mV Peak to Peak Vpp = 3.9703 V AC amplitude (Vp) = 0.155 – 0.153 = 2mV AC amplitude (Vp) = 2.0053 V DC voltage (Vdc) = 0.154 V DC voltage (Vdc) = 0.13098 V When comparing the simulation and measurement results it is clear that there is difference of 1000 times. This is due to the difference in the input AC voltages used. In the simulation, the amplitude was 1mV whereas in the measurement the amplitude was 1V. This results in the measured peak-to-peak voltage in being 1000 times greater than the simulated values. Furthermore, as they have the same frequency or period they follow the same principles, thus why they have the approximately the same gain. The DC voltage values may be slightly different due to the noise created by the AD2 when conducting the experiment. -3 -2 -1 0 1 2 3 -0.003 -0.002 -0.001 0 0.001 0.002 0.003 Volts (V) Time (s) Vo vs Time charecteristics

Q5. (10 Points) (1) Based on the simulated and measured results from Steps 1.7 and 1.14, plot the simulated and measured voltage gain magnitude and phase vs. frequency characteristics. What is the low-frequency gain of this amplifier? Figure 9: The simulated voltage gain magnitude vs frequency characteristics (Step 1.7) Figure 10: The simulated voltage gain phase vs frequency characteristics (Step 1.7) 0 0.005 0.01 0.015 0.02 0.025 0.03 1,000 1,376 1,893 2,605 3,585 4,933 6,787 9,339 12,850 17,682 24,330 33,477 46,064 63,384 87,216 120,007 165,128 227,214 312,644 430,193 591,939 814,500 1,120,740 1,542,122 2,121,938 2,919,756 4,017,542 5,528,079 7,606,557 Voltage Gain (V) Frequency (Hz) Simulated Voltage Gain Magnitude vs. Frequency Characteristics 0 50 100 150 200 250 1,000 1,408 1,982 2,790 3,927 5,528 7,782 10,955 15,421 21,709 30,560 43,019 60,559 85,250 120,007 168,936 237,814 334,775 471,267 663,410 933,893 1,314,655 1,850,660 2,605,203 3,667,384 5,162,633 7,267,518 Voltage Gain Pahse (deg) Frequency (Hz) Simulated Voltage Gain Phase vs. Frequency Characteristics

Figure 11: Measured voltage gain magnitude & phase vs frequency characteristics (Step 1.14) The low frequency gain of this amplifier for both the simulated and measured results is roughly 2 V/V. To be exact the measured results are slightly different by 0.005V as the frequency gain is 1.995, which may be due to the noise in the AD2 and calibration errors. These differences may be due to parasitic resistors and capacitors in the physical circuit which is not present in the simulations. (2) To operate this amplifier, what is its highest operating frequency to provide a constant gain as designed? The highest operating frequency to provide a constant gain as designed is 10 kHz. This is the set parameters in the measured and simulated data from the measured graph plotted above we can see that after 10 kHz the constant gain becomes non-linear resulting in a non-constant gain. Q6. (5 Points) What kind of feedback configurations (e.g., shunt-shunt) is it for the amplifier in Fig. 2? The feedback configuration for the amplifier in figure 2 is a series-shunt feedback configuration. This is determined from the series connection at the input and the parallel connection at the output which provides the feedback to the differential amplifier, resulting in a series-shunt connection. In addition, the circuit voltage is controlled with the input and output.

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Q7. (10 Points) Find the beta network and the feedback components β, R11, and R22, respectively. β = !"# (!"# %!"& ) β = #(() (#(() %#(() ) β = 0 .5 R11 = !"# ∗!"& (!"# %!"& ) R11 = #(() ∗#(() (#(() %#(() ) R11 = 50 kΩ R22 = # +&& R22 = ,& -& R22 = ࠵?࠵?1 + ࠵?࠵?2 R22 = 200 kΩ (When I1 = 0) Q8. (15 Points) Use the feedback theory and simulation results to find the amplifier's voltage gain, input resistance, and output resistance, respectively. Figure 12: Amplifier’s voltage gain, input resistance, and output resistance calculations

Part 2: Positive Feedback Circuit - Oscillator For the oscillator designed, answer the following questions with simulated and measured data and discuss any discrepancy between the simulation and measurement results. Q9. (15 Points) For the oscillator circuit in Fig. 5, find its loop gain L(s), the frequency for the zero-loop phase, and R2 /R1 for oscillation. Figure 13: Oscillator circuit loop gain calculation Q10. (5 Points) Based on the simulated results in Step 2.4, what are the settling times for R2 = 220 kΩ, 240 kΩ, and 280 kΩ, respectively? What do you observe? Explain the observed trend. The trend I observed based on the setting times for the different resistance levels is that as the resistance value increased the time decreases by about half of the previous setting time at the resistance before. This can be explained with the loop gain equation from the circuit (R2/ R1 ³ 2) Since R1 is 100 kΩ, R2 must be greater than or equal to 200 kΩ to meet the loop gain equation requirement. This is why when the resistance R2 increases, the oscillation is more efficient and happens more frequently resulting in a lower setting time. Figure 14: The setting times for R2 at different resistances (Step 2.4)

Q11. (10 Points) (1) Based on the setup in Steps 2.3, 2.5, 2.8, and 2.9, plot the simulated and measured Vout. Figure 15: The simulated Vout vs Time Characteristics for R2 = 240 kΩ (Step 2.3) Figure 16: The simulated Vout vs Time Characteristics for R3= R4 =4.02 kΩ (Step 2.5) -6.00E+00 -4.00E+00 -2.00E+00 0.00E+00 2.00E+00 4.00E+00 6.00E+00 0 0.0005 0.001 0.0015 0.002 Vout (V) Time (Sec) Vout vs Time Characteristics for R2 = 240 kΩ -6.00E+00 -4.00E+00 -2.00E+00 0.00E+00 2.00E+00 4.00E+00 6.00E+00 0 0.0005 0.001 0.0015 0.002 Vout (V) Time (Sec) Vout vs Time Characteristics for R3 = R4 = 4.02 kΩ

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Figure 17: The measured Vout vs Time Characteristics (Step 2.8) Figure 18: The measured Vout vs Time Characteristics (Step 2.9)

(2) Calculate the simulated and measured oscillation frequencies in each case. Compare and discuss them with the results from the theory. The theoretical calculations as calculated below are very similar to the measured values, within experimental error. The simulated and measured oscillation frequencies for step 2.3 and step 2.8 are both approximately 17 kHz from the plots above. The oscillation frequencies for the simulated and measured plots for step 2.4 and step 2.9 are approximately 33 kHz from the plots above. In addition, the frequency for the plots in steps 2.5 and 2.9 double because the resistance values are reduced by nearly half from 8.25 kΩ to 4.02 kΩ this happens because the relationship between the frequency and resistance is inversely proportional. Theoretical Frequency Calculations: W = starting frequency = # (! ∗. ) T = period = 2π F = / 0 = # (! ∗1 ∗&2 ) For 8.25 kΩ: For 4.02 kΩ: F = # (3&4( ∗( # ∗ #( !" ) ∗&2 ) F = # (5(&( ∗( # ∗ #( !" ) ∗&2 ) F = 19 .3 kHz F = 39 .6 kHz