Electronic Devices and Circuits II- Lab 3_Quraiz2

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Electronic Devices and Circuits II – 3EJ4 Lab #3 - Multistage Amplifiers Zuhaib Quraishi - Quraiz2 – 400306494 Date Submitted : 05/11/2023

Part 1: Common-Collector (CC) Amplifier/Emitter Follower For the common collector (CC) amplifier characterized, answer the following questions with simulated and measured data and discuss any discrepancy between the simulation and measurement results. Q1. (15 Points) Based on the simulation and measurement data obtained in Steps 1.2 and 1.6: (1) plot the simulated and measured Vo vs. Vsig characteristics and discuss/justify the characteristics. Figure 1: Simulated Vo vs Vsig of an Emitter Follower (Step 1.2) Figure 2: Measured Vo vs Vsig of an Emitter Follower (Step 1.6) -6 -4 -2 0 2 4 6 -6 -4 -2 0 2 4 6 Vo (Volt) Vsig (Volt) Simulated Vo vs. Vsig of a Emitter Follower -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 -6 -4 -2 0 2 4 6 Vo (Volt) Vsig (Volt) Measured Vo vs. Vsig of a Emitter Follower

(2) To ensure the circuit works as a common-collector (CC) amplifier, find the DC input range for Vsig and the output voltage range for Vo. The range of Vsig when the current is constant is -2.5V < Vsig < 5V and the range of Vo when the current is constant is -3V < Vo < 4.45V in order for the BJT to operate in the forward active region. (3) Find the Vsig value that results in Vo ≈ 0. Based on the results in step 1.2 the Vsig value that results in Vo ≈ 0V (Vo = -5.27 x10^-2 V) is 0.5V as shown in the table below. Figure 3: Simulated Vo and Vsig values (Step 1.2) Based on the results in step 1.6 the Vsig value that results in Vo ≈ 0V (Vo = -0.096V) is also 0.5V as shown in the table below. Figure 4: Measured Vo and Vsig values (Step 1.6)

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Q2. (10 Points) Based on the simulation and measurement data obtained in Steps 1.3 and 1.8, what are the simulated and measured intrinsic voltage gain Avo at low frequency (i.e., 100 Hz) for this CC amplifier? Report its magnitude in dB and phase in degree. Based on the simulation data obtained in step 1.3 the intrinsic voltage gain Avo at low frequency (100 Hz) is 0.00dB, and the phase in degrees is -8.47 x10 ^-5 deg. This is seen in the excel data table below. Figure 5: Voltage gain of a CC amplifier (Step 1.3) Based on the measured data obtained in step 1.8 the intrinsic voltage gain Avo at low frequency (100 Hz) is 0.8 dB, and the phase in degrees is approximately 0 deg as when measured both graphs seem to be in phase with the generated scope. Figure 6: Measured voltage gain of a CC amplifier (Step 1.8) Part 2: Differential Amplifier with Current Mirror (CM) Load For the current mirror designed, answer the following questions with simulated data and justify the simulation results. Q3. (15 Points) (1) Based on Section 8.2.3 in the textbook, derivate the relationship to express Io as a function of IREF. ࠵? ! ࠵? "#$ = ࠵? % ࠵? % (1 + 2 ࠵? ) ࠵? ! ࠵? "#$ = 1 (1 + 2 ࠵? ) ࠵? ! = ࠵? "#$ (1 + 2 ࠵? )

(2) Based on the simulation data obtained in Step 2.2, when IREF is 0.1 mA, how is Io compared with IREF? When IREF is 1 mA, how is Io compared with IERF? Based on the simulation data obtained in step 2.2, when IREF is 0.1 mA Io is 0.104mA (Row 3). When IREF is 1 mA Io is 0.975 mA (Row 93). This is displayed in the excel table below. Figure 7: Simulated DC results of a current mirror amplifier for IREF 0.1 mA (Step 2.2) Figure 8: Simulated DC results of a current mirror amplifier for IREF 1mA (Step 2.2) Figure 9: IREF and Io relationship in a current mirror (CM) amplifier (Step 2.2) (3) Justify the observation between the theoretical prediction and the simulated result at IREF is 0.1 mA and 1 mA, respectively. Comparing the observation between the theoretical prediction and simulated result Io at IREF 0.1 mA is 0.104mA, and at IREF 1 mA is 0.975 mA. As displayed on the graph above, the simulation results for Io are approximately equal to the theoretical prediction IREF as they are directly proportional to each other. The slight difference may be due to the voltage drop across Q2 which causes the early effect of the BJT resulting in the slight difference in Io when comparing the theoretical to simulation results. 0.00E+00 2.00E-04 4.00E-04 6.00E-04 8.00E-04 1.00E-03 1.20E-03 1 4 7 10131619222528313437404346495255586164677073767982858891 Current (A) Data Point IREF and Io Relationship IREF Io

Q4. (15 Points) (1) Based on the simulation data obtained in Step 2.5, what is the input impedance Rin looking from Vin toward the collector of Q1? What is the current gain Ai of the current mirror? Based on the simulation data obtained in step 2.5 the input impedance Rin looking from Vin towards the collector of Q1 is 389.12 Ω, the current gain Ai of the current mirror is 1.04, as displayed in the excel table below. Figure 10: Simulated current gain and input impedance of the CM amplifier (Step 2.5) (2) Based on the simulation data obtained in 2.6, what is the output impedance Ro of the current mirror looking into the collector of Q2? Based on the simulation data obtained in step 2.6 the output impedance Ro of the current mirror looking into the collector of is 1.58 MΩ Figure 11: Simulated output impedance of the CM amplifier (Step 2.5)

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(3) Based on the information obtained in (1) and (2), draw the linear two-port network for the current mirror using its h-parameters. Part 3: Differential Amplifier with a Current Mirror (CM) Load For the differential amplifier designed, answer the following questions with simulated and measured data and discuss any discrepancy between the simulation and measurement results. Q5. (15 Points) (1) Based on the simulation data obtained in Step 3.2, what is the voltage gain Ad in dB for the differential-mode signal? Based on the simulation data obtained in step 3.2, the voltage gain Ad for the differential mode signal is 70.07 dB, as shown in the excel table below. Figure 12: Simulated frequency response of a differential amplifier with a CM (Step 3.2)

(2) Did you observe any mismatch in Step 3.6? If yes, how much offset voltage did you apply at V2? After running the script to get the measured data for step 3.6, there was a very slight mismatch applied at V2. The offset voltage applied was -7.50 x10^-4 V. Figure 13: Measured DC offset voltage of the differential amplifier with a CM (Step 3.6) (3) Compare your simulated result with the measured result obtained in Step 3.8. Based on the simulated results and the measured results obtained in step 3.8, the differential voltage gain is 59.9 dB which is 10.17 dB lower than the simulated voltage gain in step 3.2 (70.07 dB). Figure 14: Measured differential voltage gain of a CM using scopes (Step 3.8) Q6. (10 Points) Estimate its upper 3-dB frequency fH (i.e., the frequency at which the amplitude becomes 1 / root 2 = 0.707 of its low-frequency value or the phase changes 45°). The upper 3-dB frequency when the phase change is 45 degrees is approximately 11.2 kHz, this was found by analyzing the data in step 3.2, where the closest phase shift to 45 degrees happens at row 210, this is displayed in the excel data table below. Figure 15: Simulated frequency response of a differential amplifier with a CM (Step 3.2)

Q7. (10 Points) Compare the upper 3-dB frequency f3dB of this differential amplifier with a current mirror load with that of the differential amplifier using resistive loads obtained in Q8 of Lab 2. Why does the differential amplifier with the current mirror load have a smaller f3dB? The 3-dB frequency of the differential amplifier with the current mirror load has a smaller f3dB when compared to a differential amplifier with a resistive load due to the miller effect, caused by the capacitances inside the BJTs. The current mirror load increases the amplifier’s voltage gain, and since the Miller effect causes the effective input capacitance to increase with the gain, this results in a larger input capacitance. A larger input capacitance and high gain from the current mirror load reduces the f3dB point of the differential amplifier as well as the bandwidth of the amplifier compared to differential amplifiers with resistive loads. Q8. (10 Points) What are the gain-bandwidth products (GBW) in Hz of the two differential amplifiers with the current mirror load and the resistive load, respectively? The gain-bandwidth (GBW) products in Hz for the current mirror load is 3.57 x10^7 Hz and the GBW for the resistive load is 7.95 x10^7 Hz. Figure 16: Simulated frequency response of a differential amplifier with a CM (Step 3.2)

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