MOSFET Exploration 2_N-MOSFET DC Biasing and CS Amp Configurations

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Feb 20, 2024

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MOSFET Exploration 2 N-MOSFET DC Biasing and Common-Source Amplifier Configurations: Part I: N-MOSFET DC Biasing Figure 1: N-MOSFET DC Bias Circuit 1. DC Bias Circuit Design: A. Design the NMOS DC Bias Circuit of Figure 1: that is, determine the values of R D and R S so that the transistor operates at I D = 11 mA and V D = + 2.5 V . The NMOS transistor has V tn = 2.1 V, k n = 132 mA/V 2 . (These are typical values for a BS170 transistor and should be similar to the values that you measured in MOSFET Exploration 1). Neglect the channel length modulation effect (i.e. assume that λ = 0 ). (NOTE: The MOSFET transconductance process parameter , k n ≡k n ' W L ). Outline each step of your design process and summarize your results in Table 1. (Reference: See Example 5.3 in the Sedra and Smith textbook, 7 th ed.). Include in Table 1 the standard 5% tolerance resistor values that are closest to your design values. Table 1: NMOS DC Bias Circuit Design R D R S Resistor value from design Closest Standard 5% tol.

Resistor value B. Design Validation with Multisim Live Simulation: In Multisim Live create the design of the circuit of Figure 1 using the closest standard 5% tolerance resistor values for of R D and R S and the Multisim 2N7000 NMOS model component. Insert voltage probes at nodes D and S and perform a DC Op (DC Operating Point) simulation to determine the simulated values of V D and V S . Calculate the value of I D and complete Table 2 to compare the DC Bias Point specifications in 1. A to what was achieved in the simulated circuit. Table 2 Validation of DC Bias Circuit Design V D V S I D Design Specification 2.5 V 11 mA Design Validation from Simulation Part II: Common-Source Amplifier Configurations Figure 2: NMOS Common-Source Amplifier Configurations 2. Theory:

A. Common-Source Amplifier with Source Resistor Degeneration: (S2 Open) With S2 Open, the NMOS amplifier of Figure 2 is configured as a Common-Source with Source Resistor Degeneration amplifier. A source resistor, R s , in the source branch provides DC bias stability to this design, however, when left un-bypassed (S2 Open) it results in degeneration of the magnitude of the small-signal voltage gain, A v . The theoretical small-signal voltage gain of the Common-Source with Source Resistor Degeneration configuration under No Load (S1 Open) is given by: A v = v 0 v i = − g m R D 1 + g m R S = − R D 1 g m + R S Where the value of the small-signal transconductance depends on the DC bias point and is given as: g m = I D 1 2 ( V GS − V tn ) = I D 1 2 ( V OV ) B. Common-Source Amplifier: (S2 Closed) With S2 Closed, the NMOS amplifier of Figure 2 is configured as a Common-Source amplifier. Here the source resistor R s is bypassed through capacitor C 3 removing the degeneration effect on the small-signal voltage gain. Since capacitors are open-circuits to DC, even with S2 Closed, the source resistor R s still provides the desired DC bias stability to this design. Once the source resistor is bypassed, the achievable value of the small-signal voltage gain, A v becomes much larger. The theoretical small-signal voltage gain of the Common-Source configuration under No Load (S1 Open) is given by: A v = v 0 v i =− g m R D Using the results of the Multisim Live simulated DC bias point of 1. B. and V tn = 2.2 V , calculate the theoretical values of g m and the voltage gains of (i) the Common-Source with Source Resistor Degeneration configuration under No Load (S1 Open) and (ii) the Common- Source configuration under No Load (S1 Open). Summarize your results in Table 3. Table 3 Small-signal Properties of NMOS CS Amplifier Configurations Transistor transconductance, g m (mA/V) No load voltage gain of CS with Source Degeneration, A v (V/V) No load voltage gain of CS, A v (V/V)

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3. Simulation: In Multisim Live create the design of the NMOS Common-Source Amplifier Configurations of Figure 2 in the schematic capture window. Make your layout similar to Figure 2 using the Multisim 2N7000 NMOS model component. First, perform a DC Op simulation to verify that the DC operating point ( V D and V S ) values are as expected. Next, perform two Transient simulations to determine the voltage gain of each configuration: (i) S2 Open; the Common-Source with Source Resistor Degeneration configuration under No Load (S1 Open) and (ii) S2 Closed; the Common-Source configuration under No Load (S1 Open). In each case, adjust the End time of the Transient simulation to 5e-3 s (5ms) to capture about five cycles of the 1 kHz test signal. Determine the No Load voltage gain for each configuration and export the Grapher image of the input and output voltage waveforms. Include these results in your report to compare to theory and experimentation. 4. Physical Experiment: On your breadboard, build the Common-Source Amplifier Configurations of Figure 2. [Use the BS170 NMOS transistor from your parts kit]. Pay close attention to properly identifying and connecting the BS170 Drain, Gate, and Source leads. Refer to the BS170 transistor datasheet. Also, pay close attention to the polarity connections on the electrolytic capacitors, C 1 , C 2 , and C 3 . For the physical experiment, you can replace switches S1 and S2 with simple jumper-wires. As always, use best practices when building and working with the breadboard prototype circuit. Perform the physical experiment using the AD2 and Waveforms Instrumentation in the same fashion as you did the Multisim Live simulations. Record data and export oscilloscope display images to include in your report for comparison. Additionally, for the Common-source configuration (S2 Closed), record data and export the oscilloscope display image with S1 Closed ... i.e. measure the voltage gain with a load R L = 220 Ω connected. Compare the No Load voltage gain to the loaded voltage gain. Explain your results in the context of the output resistance of the CS configuration small-signal equivalent circuit model. 5. Submit a report of your exploration. Compare and discuss your results (e.g. Are the results what you expected? How does theory, simulation, and experiment compare, etc.?), draw conclusions from your exploration (one or two paragraphs).