Using Logicly, design a circuit that counts from 0 to 7 on a display in order at every clock rising edge: display: 0 1 2 3 4 567012... Required components to be used and designed: 1) 4-bit Full Adder (FA) that adds the state bits S to a 4-bits Boolean variable V, 2) 4-bit resettable register to store the FA result, 3) a control unit/decoder that takes as input the current state S and generates the required Carry in and the V bits for the FA. You should reset the register at the beginning to initialize the current state to 0. The adder should add +1 to the state bits until 7 is reached, at that point it should generate C_in=1 and V=1000 to transform the adder into a subtractor (effectively doing 7-7=0).

Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
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Using Logicly, design a circuit that counts from 0 to 7 on a display in order at every clock rising edge:
display: 0 1 2 3 4 567012...
Required components to be used and designed:
1) 4-bit Full Adder (FA) that adds the state bits S to a 4-bits Boolean variable V,
2) 4-bit resettable register to store the FA result,
3) a control unit/decoder that takes as input the current state S and generates the required Carry in
and the V bits for the FA. You should reset the register at the beginning to initialize the current state
to 0. The adder should add +1 to the state bits until 7 is reached, at that point it should generate
C_in=1 and V=1000 to transform the adder into a subtractor (effectively doing 7-7=0).
Submission Instructions: We need to make sure the circuit you designed works as intended. You
should demonstrate the correctness of the circuit you designed by recording your screen while you
interact with the circuit. Otherwise, you can save the file and submit it. Make sure to show the switches,
the circuit, and the display at same time in the video. Use RESET to start from the beginning zero. In
the video you upload, you should show the following:
1. Starts from 0
2. Goes up to 7
3. Goes down to 0
Transcribed Image Text:Using Logicly, design a circuit that counts from 0 to 7 on a display in order at every clock rising edge: display: 0 1 2 3 4 567012... Required components to be used and designed: 1) 4-bit Full Adder (FA) that adds the state bits S to a 4-bits Boolean variable V, 2) 4-bit resettable register to store the FA result, 3) a control unit/decoder that takes as input the current state S and generates the required Carry in and the V bits for the FA. You should reset the register at the beginning to initialize the current state to 0. The adder should add +1 to the state bits until 7 is reached, at that point it should generate C_in=1 and V=1000 to transform the adder into a subtractor (effectively doing 7-7=0). Submission Instructions: We need to make sure the circuit you designed works as intended. You should demonstrate the correctness of the circuit you designed by recording your screen while you interact with the circuit. Otherwise, you can save the file and submit it. Make sure to show the switches, the circuit, and the display at same time in the video. Use RESET to start from the beginning zero. In the video you upload, you should show the following: 1. Starts from 0 2. Goes up to 7 3. Goes down to 0
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