Design Problem No. 1 – Up - Down Counter with Enable          Design, construct, and simulate a 2-bit counter that counts up and down. An enable input E determines whether the counter is on or off. If E = 0, the counter is disabled and remains at its present count even though clock pulse is applied to the flip-flops. If E = 1, the counter is enabled and a second input, x, determines the count direction. If x = 1, the circuit counts up with the sequence S1, S2, S3, S4, and count repeats. If x = 0, the circuit counts down with the sequence S4, S3, S2, S1, and the count repeats. Do not use E to disable the clock. Design the sequential circuit with E and x inputs. Implement the logic diagram with JK flip-flops.

Computer Networking: A Top-Down Approach (7th Edition)
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ISBN:9780133594140
Author:James Kurose, Keith Ross
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Design Problem No. 1 – Up - Down Counter with Enable
    
    Design, construct, and simulate a 2-bit counter that counts up and down. An enable input E determines whether the counter is on or off. If E = 0, the counter is disabled and remains at its present count even though clock pulse is applied to the flip-flops. If E = 1, the counter is enabled and a second input, x, determines the count direction. If x = 1, the circuit counts up with the sequence S1, S2, S3, S4, and count repeats. If x = 0, the circuit counts down with the sequence S4, S3, S2, S1, and the count repeats. Do not use E to disable the clock. Design the sequential circuit with E and x inputs. Implement the logic diagram with JK flip-flops.

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