Part III Design and implement a circuit that successively flashes digits 0 through 9 on the 7-segment display HEXO. Each digit should be displayed for about one second. Use a counter to determine the one-second intervals. The counter should be incremented by the 50-MHz clock signal provided on the DE-series boards. Do not derive any other clock signals in your design-make sure that all flip-flops in your circuit are clocked directly by the 50-MHz clock signal. A partial design of the required circuit is shown in Figure 2. The figure shows how a large bit-width counter can be used to produce an enable signal for a smaller counter. The rate at which the smaller counter increments can be controlled by choosing an appropriate number of bits in the larger counter. Counter 50 MH: Clock Counter Slow count Figure 2: Making a slow counter.

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**Part III**

Design and implement a circuit that successively flashes digits 0 through 9 on the 7-segment display HEX0. Each digit should be displayed for about one second. Use a counter to determine the one-second intervals. The counter should be incremented by the 50-MHz clock signal provided on the DE-series boards. Do not derive any other clock signals in your design—make sure that all flip-flops in your circuit are clocked directly by the 50-MHz clock signal. A partial design of the required circuit is shown in Figure 2. The figure shows how a large bit-width counter can be used to produce an enable signal for a smaller counter. The rate at which the smaller counter increments can be controlled by choosing an appropriate number of bits in the larger counter. 

**Figure 2: Making a slow counter.**

The diagram shows a 50 MHz clock input connected to a large counter, which has multiple outputs feeding into a control logic block (represented by curves). This logic block then supplies an enable signal ("E") to a smaller counter, resulting in a slower count rate. The setup illustrates the method of reducing the clock rate for the smaller counter through bit selection in the larger counter.
Transcribed Image Text:**Part III** Design and implement a circuit that successively flashes digits 0 through 9 on the 7-segment display HEX0. Each digit should be displayed for about one second. Use a counter to determine the one-second intervals. The counter should be incremented by the 50-MHz clock signal provided on the DE-series boards. Do not derive any other clock signals in your design—make sure that all flip-flops in your circuit are clocked directly by the 50-MHz clock signal. A partial design of the required circuit is shown in Figure 2. The figure shows how a large bit-width counter can be used to produce an enable signal for a smaller counter. The rate at which the smaller counter increments can be controlled by choosing an appropriate number of bits in the larger counter. **Figure 2: Making a slow counter.** The diagram shows a 50 MHz clock input connected to a large counter, which has multiple outputs feeding into a control logic block (represented by curves). This logic block then supplies an enable signal ("E") to a smaller counter, resulting in a slower count rate. The setup illustrates the method of reducing the clock rate for the smaller counter through bit selection in the larger counter.
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