Question 2. "Switched Capacitor Building Blocks Questions": (25 points) (a) [5 points] The switched capacitor circuit shown below emulates a resistor by opening and closing the switches according to the switching waveform as illustrated. When a clock signal is high, the switch is closed, and when a clock signal is low the switch is opened. Note that the clock signals. are non-overlapping. Assuming that the switches operate ideally at a frequency of f. 1/7, you should derive the equivalent resistance R that the circuit approximates. The correct answer is of the (mT) (nC1+pC2+q(C1-C2)+C1C2) form Reg- Find the values of m, n, p, q, and so that your derived expression matches the form of the expression above. T T/2 02 + 10, Fist Fin G Figure 1: Switched Capacitor Building Block (b) [5 points] For the switched capacitor filter shown in Figure 1, redraw the schematic such that MOS- FETs are used to implement the switches (c) 15 points] As was done in the class notes, add the various parasitic capacitances to your schematic for the switched capacitor building block. You should include top and bottom capacitor plate parasitic capacitances, source and drain parasitic junction capacitances, and MOSFET overlap capacitances. (d) [5 points] Next, make a copy of your schematic from part (c) and circle each of the parasitic capaci- tances that affects the accuracy of the emulated resistor. Review your notes to see how this was done in class and use a similar reasoning process in this case. (e) [5 points] Finally, adjust your equation derived in part (a) by combining all the parasitic capacitances that affect the accuracy of the emulated resistor into one (or more) lumped parasitic capacitances and adding them to either C1 or C2 as appropriate.
Question 2. "Switched Capacitor Building Blocks Questions": (25 points) (a) [5 points] The switched capacitor circuit shown below emulates a resistor by opening and closing the switches according to the switching waveform as illustrated. When a clock signal is high, the switch is closed, and when a clock signal is low the switch is opened. Note that the clock signals. are non-overlapping. Assuming that the switches operate ideally at a frequency of f. 1/7, you should derive the equivalent resistance R that the circuit approximates. The correct answer is of the (mT) (nC1+pC2+q(C1-C2)+C1C2) form Reg- Find the values of m, n, p, q, and so that your derived expression matches the form of the expression above. T T/2 02 + 10, Fist Fin G Figure 1: Switched Capacitor Building Block (b) [5 points] For the switched capacitor filter shown in Figure 1, redraw the schematic such that MOS- FETs are used to implement the switches (c) 15 points] As was done in the class notes, add the various parasitic capacitances to your schematic for the switched capacitor building block. You should include top and bottom capacitor plate parasitic capacitances, source and drain parasitic junction capacitances, and MOSFET overlap capacitances. (d) [5 points] Next, make a copy of your schematic from part (c) and circle each of the parasitic capaci- tances that affects the accuracy of the emulated resistor. Review your notes to see how this was done in class and use a similar reasoning process in this case. (e) [5 points] Finally, adjust your equation derived in part (a) by combining all the parasitic capacitances that affect the accuracy of the emulated resistor into one (or more) lumped parasitic capacitances and adding them to either C1 or C2 as appropriate.
Power System Analysis and Design (MindTap Course List)
6th Edition
ISBN:9781305632134
Author:J. Duncan Glover, Thomas Overbye, Mulukutla S. Sarma
Publisher:J. Duncan Glover, Thomas Overbye, Mulukutla S. Sarma
Chapter7: Symmetrical Faults
Section: Chapter Questions
Problem 7.3P
Related questions
Question
![Question 2.
"Switched Capacitor Building Blocks Questions":
(25 points)
(a) [5 points] The switched capacitor circuit shown below emulates a resistor by opening and closing
the switches according to the switching waveform as illustrated. When a clock signal is high, the
switch is closed, and when a clock signal is low the switch is opened. Note that the clock signals.
are non-overlapping. Assuming that the switches operate ideally at a frequency of f. 1/7, you
should derive the equivalent resistance R that the circuit approximates. The correct answer is of the
(mT)
(nC1+pC2+q(C1-C2)+C1C2)
form
Reg-
Find the values of m, n, p, q, and so that your derived expression matches the form of the
expression above.
T
T/2
02
+
10,
Fist
Fin
G
Figure 1: Switched Capacitor Building Block
(b) [5 points] For the switched capacitor filter shown in Figure 1, redraw the schematic such that MOS-
FETs are used to implement the switches
(c) 15 points] As was done in the class notes, add the various parasitic capacitances to your schematic for
the switched capacitor building block. You should include top and bottom capacitor plate parasitic
capacitances, source and drain parasitic junction capacitances, and MOSFET overlap capacitances.
(d) [5 points] Next, make a copy of your schematic from part (c) and circle each of the parasitic capaci-
tances that affects the accuracy of the emulated resistor. Review your notes to see how this was done
in class and use a similar reasoning process in this case.
(e) [5 points] Finally, adjust your equation derived in part (a) by combining all the parasitic capacitances
that affect the accuracy of the emulated resistor into one (or more) lumped parasitic capacitances and
adding them to either C1 or C2 as appropriate.](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2Ff8629f14-27e6-479f-a47a-56983e06d459%2F8abe5acb-68c3-4cba-9e4c-416bade7c5f3%2Fkovy75q_processed.jpeg&w=3840&q=75)
Transcribed Image Text:Question 2.
"Switched Capacitor Building Blocks Questions":
(25 points)
(a) [5 points] The switched capacitor circuit shown below emulates a resistor by opening and closing
the switches according to the switching waveform as illustrated. When a clock signal is high, the
switch is closed, and when a clock signal is low the switch is opened. Note that the clock signals.
are non-overlapping. Assuming that the switches operate ideally at a frequency of f. 1/7, you
should derive the equivalent resistance R that the circuit approximates. The correct answer is of the
(mT)
(nC1+pC2+q(C1-C2)+C1C2)
form
Reg-
Find the values of m, n, p, q, and so that your derived expression matches the form of the
expression above.
T
T/2
02
+
10,
Fist
Fin
G
Figure 1: Switched Capacitor Building Block
(b) [5 points] For the switched capacitor filter shown in Figure 1, redraw the schematic such that MOS-
FETs are used to implement the switches
(c) 15 points] As was done in the class notes, add the various parasitic capacitances to your schematic for
the switched capacitor building block. You should include top and bottom capacitor plate parasitic
capacitances, source and drain parasitic junction capacitances, and MOSFET overlap capacitances.
(d) [5 points] Next, make a copy of your schematic from part (c) and circle each of the parasitic capaci-
tances that affects the accuracy of the emulated resistor. Review your notes to see how this was done
in class and use a similar reasoning process in this case.
(e) [5 points] Finally, adjust your equation derived in part (a) by combining all the parasitic capacitances
that affect the accuracy of the emulated resistor into one (or more) lumped parasitic capacitances and
adding them to either C1 or C2 as appropriate.
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